LXR uboot/drivers/i2c/adi

   1/*
   2 * i2c.c - driver for ADI TWI/I2C
   3 *
   4 * Copyright (c) 2006-2014 Analog Devices Inc.
   5 *
   6 * Licensed under the GPL-2 or later.
   7 */
   8
   9#include <common.h>
  10#include <i2c.h>
  11
  12#include <asm/clock.h>
  13#include <asm/twi.h>
  14#include <asm/io.h>
  15
  16static struct twi_regs *i2c_get_base(struct i2c_adapter *adap);
  17
  18/* Every register is 32bit aligned, but only 16bits in size */
  19#define ureg(name) u16 name; u16 __pad_##name;
  20struct twi_regs {
  21        ureg(clkdiv);
  22        ureg(control);
  23        ureg(slave_ctl);
  24        ureg(slave_stat);
  25        ureg(slave_addr);
  26        ureg(master_ctl);
  27        ureg(master_stat);
  28        ureg(master_addr);
  29        ureg(int_stat);
  30        ureg(int_mask);
  31        ureg(fifo_ctl);
  32        ureg(fifo_stat);
  33        char __pad[0x50];
  34        ureg(xmt_data8);
  35        ureg(xmt_data16);
  36        ureg(rcv_data8);
  37        ureg(rcv_data16);
  38};
  39#undef ureg
  40
  41#ifdef TWI_CLKDIV
  42#define TWI0_CLKDIV TWI_CLKDIV
  43# ifdef CONFIG_SYS_MAX_I2C_BUS
  44# undef CONFIG_SYS_MAX_I2C_BUS
  45# endif
  46#define CONFIG_SYS_MAX_I2C_BUS 1
  47#endif
  48
  49/*
  50 * The way speed is changed into duty often results in integer truncation
  51 * with 50% duty, so we'll force rounding up to the next duty by adding 1
  52 * to the max.  In practice this will get us a speed of something like
  53 * 385 KHz.  The other limit is easy to handle as it is only 8 bits.
  54 */
  55#define I2C_SPEED_MAX             400000
  56#define I2C_SPEED_TO_DUTY(speed)  (5000000 / (speed))
  57#define I2C_DUTY_MAX              (I2C_SPEED_TO_DUTY(I2C_SPEED_MAX) + 1)
  58#define I2C_DUTY_MIN              0xff  /* 8 bit limited */
  59#define SYS_I2C_DUTY              I2C_SPEED_TO_DUTY(CONFIG_SYS_I2C_SPEED)
  60/* Note: duty is inverse of speed, so the comparisons below are correct */
  61#if SYS_I2C_DUTY < I2C_DUTY_MAX || SYS_I2C_DUTY > I2C_DUTY_MIN
  62# error "The I2C hardware can only operate 20KHz - 400KHz"
  63#endif
  64
  65/* All transfers are described by this data structure */
  66struct adi_i2c_msg {
  67        u8 flags;
  68#define I2C_M_COMBO             0x4
  69#define I2C_M_STOP              0x2
  70#define I2C_M_READ              0x1
  71        int len;                /* msg length */
  72        u8 *buf;                /* pointer to msg data */
  73        int alen;               /* addr length */
  74        u8 *abuf;               /* addr buffer */
  75};
  76
  77/* Allow msec timeout per ~byte transfer */
  78#define I2C_TIMEOUT 10
  79
  80/**
  81 * wait_for_completion - manage the actual i2c transfer
  82 *      @msg: the i2c msg
  83 */
  84static int wait_for_completion(struct twi_regs *twi, struct adi_i2c_msg *msg)
  85{
  86        u16 int_stat, ctl;
  87        ulong timebase = get_timer(0);
  88
  89        do {
  90                int_stat = readw(&twi->int_stat);
  91
  92                if (int_stat & XMTSERV) {
  93                        writew(XMTSERV, &twi->int_stat);
  94                        if (msg->alen) {
  95                                writew(*(msg->abuf++), &twi->xmt_data8);
  96                                --msg->alen;
  97                        } else if (!(msg->flags & I2C_M_COMBO) && msg->len) {
  98                                writew(*(msg->buf++), &twi->xmt_data8);
  99                                --msg->len;
 100                        } else {
 101                                ctl = readw(&twi->master_ctl);
 102                                if (msg->flags & I2C_M_COMBO)
 103                                        writew(ctl | RSTART | MDIR,
 104                                                        &twi->master_ctl);
 105                                else
 106                                        writew(ctl | STOP, &twi->master_ctl);
 107                        }
 108                }
 109                if (int_stat & RCVSERV) {
 110                        writew(RCVSERV, &twi->int_stat);
 111                        if (msg->len) {
 112                                *(msg->buf++) = readw(&twi->rcv_data8);
 113                                --msg->len;
 114                        } else if (msg->flags & I2C_M_STOP) {
 115                                ctl = readw(&twi->master_ctl);
 116                                writew(ctl | STOP, &twi->master_ctl);
 117                        }
 118                }
 119                if (int_stat & MERR) {
 120                        writew(MERR, &twi->int_stat);
 121                        return msg->len;
 122                }
 123                if (int_stat & MCOMP) {
 124                        writew(MCOMP, &twi->int_stat);
 125                        if (msg->flags & I2C_M_COMBO && msg->len) {
 126                                ctl = readw(&twi->master_ctl);
 127                                ctl = (ctl & ~RSTART) |
 128                                        (min(msg->len, 0xff) << 6) | MEN | MDIR;
 129                                writew(ctl, &twi->master_ctl);
 130                        } else
 131                                break;
 132                }
 133
 134                /* If we were able to do something, reset timeout */
 135                if (int_stat)
 136                        timebase = get_timer(0);
 137
 138        } while (get_timer(timebase) < I2C_TIMEOUT);
 139
 140        return msg->len;
 141}
 142
 143static int i2c_transfer(struct i2c_adapter *adap, uint8_t chip, uint addr,
 144                        int alen, uint8_t *buffer, int len, uint8_t flags)
 145{
 146        struct twi_regs *twi = i2c_get_base(adap);
 147        int ret;
 148        u16 ctl;
 149        uchar addr_buffer[] = {
 150                (addr >>  0),
 151                (addr >>  8),
 152                (addr >> 16),
 153        };
 154        struct adi_i2c_msg msg = {
 155                .flags = flags | (len >= 0xff ? I2C_M_STOP : 0),
 156                .buf   = buffer,
 157                .len   = len,
 158                .abuf  = addr_buffer,
 159                .alen  = alen,
 160        };
 161
 162        /* wait for things to settle */
 163        while (readw(&twi->master_stat) & BUSBUSY)
 164                if (ctrlc())
 165                        return 1;
 166
 167        /* Set Transmit device address */
 168        writew(chip, &twi->master_addr);
 169
 170        /* Clear the FIFO before starting things */
 171        writew(XMTFLUSH | RCVFLUSH, &twi->fifo_ctl);
 172        writew(0, &twi->fifo_ctl);
 173
 174        /* prime the pump */
 175        if (msg.alen) {
 176                len = (msg.flags & I2C_M_COMBO) ? msg.alen : msg.alen + len;
 177                writew(*(msg.abuf++), &twi->xmt_data8);
 178                --msg.alen;
 179        } else if (!(msg.flags & I2C_M_READ) && msg.len) {
 180                writew(*(msg.buf++), &twi->xmt_data8);
 181                --msg.len;
 182        }
 183
 184        /* clear int stat */
 185        writew(-1, &twi->master_stat);
 186        writew(-1, &twi->int_stat);
 187        writew(0, &twi->int_mask);
 188
 189        /* Master enable */
 190        ctl = readw(&twi->master_ctl);
 191        ctl = (ctl & FAST) | (min(len, 0xff) << 6) | MEN |
 192                ((msg.flags & I2C_M_READ) ? MDIR : 0);
 193        writew(ctl, &twi->master_ctl);
 194
 195        /* process the rest */
 196        ret = wait_for_completion(twi, &msg);
 197
 198        if (ret) {
 199                ctl = readw(&twi->master_ctl) & ~MEN;
 200                writew(ctl, &twi->master_ctl);
 201                ctl = readw(&twi->control) & ~TWI_ENA;
 202                writew(ctl, &twi->control);
 203                ctl = readw(&twi->control) | TWI_ENA;
 204                writew(ctl, &twi->control);
 205        }
 206
 207        return ret;
 208}
 209
 210static uint adi_i2c_setspeed(struct i2c_adapter *adap, uint speed)
 211{
 212        struct twi_regs *twi = i2c_get_base(adap);
 213        u16 clkdiv = I2C_SPEED_TO_DUTY(speed);
 214
 215        /* Set TWI interface clock */
 216        if (clkdiv < I2C_DUTY_MAX || clkdiv > I2C_DUTY_MIN)
 217                return -1;
 218        clkdiv = (clkdiv << 8) | (clkdiv & 0xff);
 219        writew(clkdiv, &twi->clkdiv);
 220
 221        /* Don't turn it on */
 222        writew(speed > 100000 ? FAST : 0, &twi->master_ctl);
 223
 224        return 0;
 225}
 226
 227static void adi_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
 228{
 229        struct twi_regs *twi = i2c_get_base(adap);
 230        u16 prescale = ((get_i2c_clk() / 1000 / 1000 + 5) / 10) & 0x7F;
 231
 232        /* Set TWI internal clock as 10MHz */
 233        writew(prescale, &twi->control);
 234
 235        /* Set TWI interface clock as specified */
 236        i2c_set_bus_speed(speed);
 237
 238        /* Enable it */
 239        writew(TWI_ENA | prescale, &twi->control);
 240}
 241
 242static int adi_i2c_read(struct i2c_adapter *adap, uint8_t chip,
 243                        uint addr, int alen, uint8_t *buffer, int len)
 244{
 245        return i2c_transfer(adap, chip, addr, alen, buffer,
 246                        len, alen ? I2C_M_COMBO : I2C_M_READ);
 247}
 248
 249static int adi_i2c_write(struct i2c_adapter *adap, uint8_t chip,
 250                        uint addr, int alen, uint8_t *buffer, int len)
 251{
 252        return i2c_transfer(adap, chip, addr, alen, buffer, len, 0);
 253}
 254
 255static int adi_i2c_probe(struct i2c_adapter *adap, uint8_t chip)
 256{
 257        u8 byte;
 258        return adi_i2c_read(adap, chip, 0, 0, &byte, 1);
 259}
 260
 261static struct twi_regs *i2c_get_base(struct i2c_adapter *adap)
 262{
 263        switch (adap->hwadapnr) {
 264#if CONFIG_SYS_MAX_I2C_BUS > 2
 265        case 2:
 266                return (struct twi_regs *)TWI2_CLKDIV;
 267#endif
 268#if CONFIG_SYS_MAX_I2C_BUS > 1
 269        case 1:
 270                return (struct twi_regs *)TWI1_CLKDIV;
 271#endif
 272        case 0:
 273                return (struct twi_regs *)TWI0_CLKDIV;
 274
 275        default:
 276                printf("wrong hwadapnr: %d\n", adap->hwadapnr);
 277        }
 278
 279        return NULL;
 280}
 281
 282U_BOOT_I2C_ADAP_COMPLETE(adi_i2c0, adi_i2c_init, adi_i2c_probe,
 283                         adi_i2c_read, adi_i2c_write,
 284                         adi_i2c_setspeed,
 285                         CONFIG_SYS_I2C_SPEED,
 286                         0,
 287                         0)
 288
 289#if CONFIG_SYS_MAX_I2C_BUS > 1
 290U_BOOT_I2C_ADAP_COMPLETE(adi_i2c1, adi_i2c_init, adi_i2c_probe,
 291                         adi_i2c_read, adi_i2c_write,
 292                         adi_i2c_setspeed,
 293                         CONFIG_SYS_I2C_SPEED,
 294                         0,
 295                         1)
 296#endif
 297
 298#if CONFIG_SYS_MAX_I2C_BUS > 2
 299U_BOOT_I2C_ADAP_COMPLETE(adi_i2c2, adi_i2c_init, adi_i2c_probe,
 300                         adi_i2c_read, adi_i2c_write,
 301                         adi_i2c_setspeed,
 302                         CONFIG_SYS_I2C_SPEED,
 303                         0,
 304                         2)
 305#endif
 306