LXR uboot/arch/m68k/include/asm/coldfire/skha.h

   1/*
   2 * Symmetric Key Hardware Accelerator Memory Map
   3 *
   4 * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
   5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
   6 *
   7 * SPDX-License-Identifier:     GPL-2.0+
   8 */
   9
  10#ifndef __SKHA_H__
  11#define __SKHA_H__
  12
  13typedef struct skha_ctrl {
  14        u32 mr;                 /* 0x00 Mode */
  15        u32 cr;                 /* 0x04 Control */
  16        u32 cmr;                /* 0x08 Command */
  17        u32 sr;                 /* 0x0C Status */
  18        u32 esr;                /* 0x10 Error Status */
  19        u32 emr;                /* 0x14 Error Status Mask Register) */
  20        u32 ksr;                /* 0x18 Key Size */
  21        u32 dsr;                /* 0x1C Data Size */
  22        u32 in;                 /* 0x20 Input FIFO */
  23        u32 out;                /* 0x24 Output FIFO */
  24        u32 res1[2];            /* 0x28 - 0x2F */
  25        u32 kdr1;               /* 0x30 Key Data 1  */
  26        u32 kdr2;               /* 0x34 Key Data 2 */
  27        u32 kdr3;               /* 0x38 Key Data 3 */
  28        u32 kdr4;               /* 0x3C Key Data 4 */
  29        u32 kdr5;               /* 0x40 Key Data 5 */
  30        u32 kdr6;               /* 0x44 Key Data 6 */
  31        u32 res2[10];           /* 0x48 - 0x6F */
  32        u32 c1;                 /* 0x70 Context 1 */
  33        u32 c2;                 /* 0x74 Context 2 */
  34        u32 c3;                 /* 0x78 Context 3 */
  35        u32 c4;                 /* 0x7C Context 4 */
  36        u32 c5;                 /* 0x80 Context 5 */
  37        u32 c6;                 /* 0x84 Context 6 */
  38        u32 c7;                 /* 0x88 Context 7 */
  39        u32 c8;                 /* 0x8C Context 8 */
  40        u32 c9;                 /* 0x90 Context 9 */
  41        u32 c10;                /* 0x94 Context 10 */
  42        u32 c11;                /* 0x98 Context 11 */
  43        u32 c12;                /* 0x9C Context 12 - 5235, 5271, 5272 */
  44} skha_t;
  45
  46#ifdef CONFIG_MCF532x
  47#define SKHA_MODE_CTRM(x)       (((x) & 0x0F) << 9)
  48#define SKHA_MODE_CTRM_MASK     (0xFFFFE1FF)
  49#define SKHA_MODE_DKP           (0x00000100)
  50#else
  51#define SKHA_MODE_CTRM(x)       (((x) & 0x0F) << 8)
  52#define SKHA_MODE_CTRM_MASK     (0xFFFFF0FF)
  53#define SKHA_MODE_DKP           (0x00000080)
  54#endif
  55#define SKHA_MODE_CM(x)         (((x) & 0x03) << 3)
  56#define SKHA_MODE_CM_MASK       (0xFFFFFFE7)
  57#define SKHA_MODE_DIR           (0x00000004)
  58#define SKHA_MODE_ALG(x)        ((x) & 0x03)
  59#define SKHA_MODE_ALG_MASK      (0xFFFFFFFC)
  60
  61#define SHKA_CR_ODMAL(x)        (((x) & 0x3F) << 24)
  62#define SHKA_CR_ODMAL_MASK      (0xC0FFFFFF)
  63#define SHKA_CR_IDMAL(x)        (((x) & 0x3F) << 16)
  64#define SHKA_CR_IDMAL_MASK      (0xFFC0FFFF)
  65#define SHKA_CR_END             (0x00000008)
  66#define SHKA_CR_ODMA            (0x00000004)
  67#define SHKA_CR_IDMA            (0x00000002)
  68#define SKHA_CR_IE              (0x00000001)
  69
  70#define SKHA_CMR_GO             (0x00000008)
  71#define SKHA_CMR_CI             (0x00000004)
  72#define SKHA_CMR_RI             (0x00000002)
  73#define SKHA_CMR_SWR            (0x00000001)
  74
  75#define SKHA_SR_OFL(x)          (((x) & 0xFF) << 24)
  76#define SKHA_SR_OFL_MASK        (0x00FFFFFF)
  77#define SKHA_SR_IFL(x)          (((x) & 0xFF) << 16)
  78#define SKHA_SR_IFL_MASK        (0xFF00FFFF)
  79#define SKHA_SR_AESES(x)        (((x) & 0x1F) << 11)
  80#define SKHA_SR_AESES_MASK      (0xFFFF07FF)
  81#define SKHA_SR_DESES(x)        (((x) & 0x7) << 8)
  82#define SKHA_SR_DESES_MASK      (0xFFFFF8FF)
  83#define SKHA_SR_BUSY            (0x00000010)
  84#define SKHA_SR_RD              (0x00000008)
  85#define SKHA_SR_ERR             (0x00000004)
  86#define SKHA_SR_DONE            (0x00000002)
  87#define SKHA_SR_INT             (0x00000001)
  88
  89#define SHKA_ESE_DRL            (0x00000800)
  90#define SKHA_ESR_KRE            (0x00000400)
  91#define SKHA_ESR_KPE            (0x00000200)
  92#define SKHA_ESR_ERE            (0x00000100)
  93#define SKHA_ESR_RMDP           (0x00000080)
  94#define SKHA_ESR_KSE            (0x00000040)
  95#define SKHA_ESR_DSE            (0x00000020)
  96#define SKHA_ESR_IME            (0x00000010)
  97#define SKHA_ESR_NEOF           (0x00000008)
  98#define SKHA_ESR_NEIF           (0x00000004)
  99#define SKHA_ESR_OFU            (0x00000002)
 100#define SKHA_ESR_IFO            (0x00000001)
 101
 102#define SKHA_KSR_SZ(x)          ((x) & 0x3F)
 103#define SKHA_KSR_SZ_MASK        (0xFFFFFFC0)
 104
 105#endif                          /* __SKHA_H__ */
 106