LXR uboot/board/davinci/sffsdr/sffsdr.c

   1/*
   2 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
   3 *
   4 * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
   5 * Copyright (C) 2008 Philip Balister, OpenSDR <philip@opensdr.com>
   6 *
   7 * Parts are shamelessly stolen from various TI sources, original copyright
   8 * follows:
   9 *
  10 * Copyright (C) 2004 Texas Instruments.
  11 *
  12 * SPDX-License-Identifier:     GPL-2.0+
  13 */
  14
  15#include <common.h>
  16#include <i2c.h>
  17#include <asm/arch/hardware.h>
  18#include <asm/arch/davinci_misc.h>
  19
  20#define DAVINCI_A3CR     (0x01E00014)   /* EMIF-A CS3 config register. */
  21#define DAVINCI_A3CR_VAL (0x3FFFFFFD)   /* EMIF-A CS3 value for FPGA. */
  22
  23#define INTEGRITY_SYSCFG_OFFSET    0x7E8
  24#define INTEGRITY_CHECKWORD_OFFSET 0x7F8
  25#define INTEGRITY_CHECKWORD_VALUE  0x10ADBEEF
  26
  27DECLARE_GLOBAL_DATA_PTR;
  28
  29int board_init(void)
  30{
  31        /* arch number of the board */
  32        gd->bd->bi_arch_number = MACH_TYPE_SFFSDR;
  33
  34        /* address of boot parameters */
  35        gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
  36
  37        davinci_errata_workarounds();
  38
  39        /* Power on required peripherals */
  40        lpsc_on(DAVINCI_LPSC_GPIO);
  41
  42#if !defined(CONFIG_SYS_USE_DSPLINK)
  43        /* Powerup the DSP */
  44        dsp_on();
  45#endif /* CONFIG_SYS_USE_DSPLINK */
  46
  47        davinci_enable_uart0();
  48        davinci_enable_emac();
  49        davinci_enable_i2c();
  50
  51        lpsc_on(DAVINCI_LPSC_TIMER1);
  52        timer_init();
  53
  54        return(0);
  55}
  56
  57/* Read ethernet MAC address from Integrity data structure inside EEPROM.
  58 * Returns 1 if found, 0 otherwise.
  59 */
  60static int sffsdr_read_mac_address(uint8_t *buf)
  61{
  62        u_int32_t value, mac[2], address;
  63
  64        /* Read Integrity data structure checkword. */
  65        if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, INTEGRITY_CHECKWORD_OFFSET,
  66                     CONFIG_SYS_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4))
  67                goto err;
  68        if (value != INTEGRITY_CHECKWORD_VALUE)
  69                return 0;
  70
  71        /* Read SYSCFG structure offset. */
  72        if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, INTEGRITY_SYSCFG_OFFSET,
  73                     CONFIG_SYS_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4))
  74                goto err;
  75        address = 0x800 + (int) value; /* Address of SYSCFG structure. */
  76
  77        /* Read NET CONFIG structure offset. */
  78        if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, address,
  79                     CONFIG_SYS_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4))
  80                goto err;
  81        address = 0x800 + (int) value; /* Address of NET CONFIG structure. */
  82        address += 12; /* Address of NET INTERFACE CONFIG structure. */
  83
  84        /* Read NET INTERFACE CONFIG 2 structure offset. */
  85        if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, address,
  86                     CONFIG_SYS_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4))
  87                goto err;
  88        address = 0x800 + 16 + (int) value;     /* Address of NET INTERFACE
  89                                                 * CONFIG 2 structure. */
  90
  91        /* Read MAC address. */
  92        if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, address,
  93                     CONFIG_SYS_I2C_EEPROM_ADDR_LEN, (uint8_t *) &mac[0], 8))
  94                goto err;
  95
  96        buf[0] = mac[0] >> 24;
  97        buf[1] = mac[0] >> 16;
  98        buf[2] = mac[0] >> 8;
  99        buf[3] = mac[0];
 100        buf[4] = mac[1] >> 24;
 101        buf[5] = mac[1] >> 16;
 102
 103        return 1; /* Found */
 104
 105err:
 106        printf("Read from EEPROM @ 0x%02x failed\n", CONFIG_SYS_I2C_EEPROM_ADDR);
 107        return 0;
 108}
 109
 110/* Platform dependent initialisation. */
 111int misc_init_r(void)
 112{
 113        uint8_t i2cbuf;
 114        uint8_t eeprom_enetaddr[6];
 115
 116        /* EMIF-A CS3 configuration for FPGA. */
 117        REG(DAVINCI_A3CR) = DAVINCI_A3CR_VAL;
 118
 119        /* Configure I2C switch (PCA9543) to enable channel 0. */
 120        i2cbuf = CONFIG_SYS_I2C_PCA9543_ENABLE_CH0;
 121        if (i2c_write(CONFIG_SYS_I2C_PCA9543_ADDR, 0,
 122                      CONFIG_SYS_I2C_PCA9543_ADDR_LEN, &i2cbuf, 1)) {
 123                printf("Write to MUX @ 0x%02x failed\n", CONFIG_SYS_I2C_PCA9543_ADDR);
 124                return 1;
 125        }
 126
 127        /* Read Ethernet MAC address from EEPROM if available. */
 128        if (sffsdr_read_mac_address(eeprom_enetaddr))
 129                davinci_sync_env_enetaddr(eeprom_enetaddr);
 130
 131        return(0);
 132}
 133