1/* 2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7#ifndef _ARCH_QEMU_H_ 8#define _ARCH_QEMU_H_ 9 10/* Programmable Attribute Map (PAM) Registers */ 11#define I440FX_PAM 0x59 12#define Q35_PAM 0x90 13#define PAM_NUM 7 14#define PAM_RW 0x33 15 16/* X-Bus Chip Select Register */ 17#define XBCS 0x4e 18#define APIC_EN (1 << 8) 19 20/* IDE Timing Register */ 21#define IDE0_TIM 0x40 22#define IDE1_TIM 0x42 23#define IDE_DECODE_EN (1 << 15) 24 25/* PCIe ECAM Base Address Register */ 26#define PCIEX_BAR 0x60 27#define BAR_EN (1 << 0) 28 29/* I/O Ports */ 30#define CMOS_ADDR_PORT 0x70 31#define CMOS_DATA_PORT 0x71 32 33#define LOW_RAM_ADDR 0x34 34#define HIGH_RAM_ADDR 0x35 35 36#endif /* _ARCH_QEMU_H_ */ 37