LXR uboot/arch/x86/lib/ramtest.c

   1/*
   2 * Copyright (c) 2014 Google, Inc
   3 *
   4 * From Coreboot src/lib/ramtest.c
   5 *
   6 * SPDX-License-Identifier:     GPL-2.0
   7 */
   8
   9#include <common.h>
  10#include <asm/io.h>
  11#include <asm/post.h>
  12
  13static void write_phys(unsigned long addr, u32 value)
  14{
  15#if CONFIG_SSE2
  16        asm volatile(
  17                "movnti %1, (%0)"
  18                : /* outputs */
  19                : "r" (addr), "r" (value) /* inputs */
  20                : /* clobbers */
  21                );
  22#else
  23        writel(value, addr);
  24#endif
  25}
  26
  27static u32 read_phys(unsigned long addr)
  28{
  29        return readl(addr);
  30}
  31
  32static void phys_memory_barrier(void)
  33{
  34#if CONFIG_SSE2
  35        /* Needed for movnti */
  36        asm volatile(
  37                "sfence"
  38                :
  39                :
  40                : "memory"
  41        );
  42#else
  43        asm volatile(""
  44                :
  45                :
  46                : "memory");
  47#endif
  48}
  49
  50void quick_ram_check(void)
  51{
  52        int fail = 0;
  53        u32 backup;
  54
  55        backup = read_phys(CONFIG_RAMBASE);
  56        write_phys(CONFIG_RAMBASE, 0x55555555);
  57        phys_memory_barrier();
  58        if (read_phys(CONFIG_RAMBASE) != 0x55555555)
  59                fail = 1;
  60        write_phys(CONFIG_RAMBASE, 0xaaaaaaaa);
  61        phys_memory_barrier();
  62        if (read_phys(CONFIG_RAMBASE) != 0xaaaaaaaa)
  63                fail = 1;
  64        write_phys(CONFIG_RAMBASE, 0x00000000);
  65        phys_memory_barrier();
  66        if (read_phys(CONFIG_RAMBASE) != 0x00000000)
  67                fail = 1;
  68        write_phys(CONFIG_RAMBASE, 0xffffffff);
  69        phys_memory_barrier();
  70        if (read_phys(CONFIG_RAMBASE) != 0xffffffff)
  71                fail = 1;
  72
  73        write_phys(CONFIG_RAMBASE, backup);
  74        if (fail) {
  75                post_code(POST_RAM_FAILURE);
  76                panic("RAM INIT FAILURE!\n");
  77        }
  78        phys_memory_barrier();
  79}
  80