1/* 2 * Configuation settings for the Alpha Project AP-SH4A-4A board 3 * 4 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9#ifndef __AP_SH4A_4A_H 10#define __AP_SH4A_4A_H 11 12#undef DEBUG 13#define CONFIG_CPU_SH7734 1 14#define CONFIG_AP_SH4A_4A 1 15#define CONFIG_400MHZ_MODE 1 16/* #define CONFIG_533MHZ_MODE 1 */ 17 18#define CONFIG_BOARD_LATE_INIT 19#define CONFIG_SYS_TEXT_BASE 0x8BFC0000 20 21#define CONFIG_CMD_PING 22#define CONFIG_CMD_MII 23#define CONFIG_CMD_SDRAM 24#define CONFIG_CMD_ENV 25 26#define CONFIG_BAUDRATE 115200 27#define CONFIG_BOOTDELAY 3 28#define CONFIG_BOOTARGS "console=ttySC4,115200" 29 30#define CONFIG_VERSION_VARIABLE 31#undef CONFIG_SHOW_BOOT_PROGRESS 32 33/* Ether */ 34#define CONFIG_SH_ETHER 1 35#define CONFIG_SH_ETHER_USE_PORT (0) 36#define CONFIG_SH_ETHER_PHY_ADDR (0x0) 37#define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII) 38#define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */ 39#define CONFIG_PHYLIB 40#define CONFIG_PHY_MICREL 1 41#define CONFIG_BITBANGMII 42#define CONFIG_BITBANGMII_MULTI 43 44/* I2C */ 45#define CONFIG_CMD_I2C 46#define CONFIG_SH_SH7734_I2C 1 47#define CONFIG_HARD_I2C 1 48#define CONFIG_I2C_MULTI_BUS 1 49#define CONFIG_SYS_MAX_I2C_BUS 2 50#define CONFIG_SYS_I2C_MODULE 0 51#define CONFIG_SYS_I2C_SPEED 400000 /* 400 kHz */ 52#define CONFIG_SYS_I2C_SLAVE 0x50 53#define CONFIG_SH_I2C_DATA_HIGH 4 54#define CONFIG_SH_I2C_DATA_LOW 5 55#define CONFIG_SH_I2C_CLOCK 500000000 56#define CONFIG_SH_I2C_BASE0 0xFFC70000 57#define CONFIG_SH_I2C_BASE1 0xFFC71000 58 59/* undef to save memory */ 60#define CONFIG_SYS_LONGHELP 61/* Monitor Command Prompt */ 62/* Buffer size for input from the Console */ 63#define CONFIG_SYS_CBSIZE 256 64/* Buffer size for Console output */ 65#define CONFIG_SYS_PBSIZE 256 66/* max args accepted for monitor commands */ 67#define CONFIG_SYS_MAXARGS 16 68/* Buffer size for Boot Arguments passed to kernel */ 69#define CONFIG_SYS_BARGSIZE 512 70/* List of legal baudrate settings for this board */ 71#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 72 73/* SCIF */ 74#define CONFIG_SCIF_CONSOLE 1 75#define CONFIG_SCIF 1 76#define CONFIG_CONS_SCIF4 1 77 78/* Suppress display of console information at boot */ 79#undef CONFIG_SYS_CONSOLE_INFO_QUIET 80#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 81#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 82 83/* SDRAM */ 84#define CONFIG_SYS_SDRAM_BASE (0x88000000) 85#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) 86#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 87 88#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 89#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE) 90/* Enable alternate, more extensive, memory test */ 91#undef CONFIG_SYS_ALT_MEMTEST 92/* Scratch address used by the alternate memory test */ 93#undef CONFIG_SYS_MEMTEST_SCRATCH 94 95/* Enable temporary baudrate change while serial download */ 96#undef CONFIG_SYS_LOADS_BAUD_CHANGE 97 98/* FLASH */ 99#define CONFIG_FLASH_CFI_DRIVER 1 100#define CONFIG_SYS_FLASH_CFI 101#undef CONFIG_SYS_FLASH_QUIET_TEST 102#define CONFIG_SYS_FLASH_EMPTY_INFO 103#define CONFIG_SYS_FLASH_BASE (0xA0000000) 104#define CONFIG_SYS_MAX_FLASH_SECT 512 105 106/* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 107#define CONFIG_SYS_MAX_FLASH_BANKS 1 108#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 109 110/* Timeout for Flash erase operations (in ms) */ 111#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 112/* Timeout for Flash write operations (in ms) */ 113#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 114/* Timeout for Flash set sector lock bit operations (in ms) */ 115#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 116/* Timeout for Flash clear lock bit operations (in ms) */ 117#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 118 119/* 120 * Use hardware flash sectors protection instead 121 * of U-Boot software protection 122 */ 123#undef CONFIG_SYS_FLASH_PROTECTION 124#undef CONFIG_SYS_DIRECT_FLASH_TFTP 125 126/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 127#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 128/* Monitor size */ 129#define CONFIG_SYS_MONITOR_LEN (256 * 1024) 130/* Size of DRAM reserved for malloc() use */ 131#define CONFIG_SYS_MALLOC_LEN (256 * 1024) 132#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 133 134/* ENV setting */ 135#define CONFIG_ENV_IS_IN_FLASH 136#define CONFIG_ENV_OVERWRITE 1 137#define CONFIG_ENV_SECT_SIZE (128 * 1024) 138#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 139#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 140/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 141#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 142#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 143 144/* Board Clock */ 145#if defined(CONFIG_400MHZ_MODE) 146#define CONFIG_SYS_CLK_FREQ 50000000 147#else 148#define CONFIG_SYS_CLK_FREQ 44444444 149#endif 150#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 151#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 152#define CONFIG_SYS_TMU_CLK_DIV 4 153 154#endif /* __AP_SH4A_4A_H */ 155