uboot/include/configs/bf527-ezkit.h
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   1/*
   2 * U-boot - Configuration file for BF537 STAMP board
   3 */
   4
   5#ifndef __CONFIG_BF527_EZKIT_H__
   6#define __CONFIG_BF527_EZKIT_H__
   7
   8#include <asm/config-pre.h>
   9
  10
  11/*
  12 * Processor Settings
  13 */
  14#define CONFIG_BFIN_CPU             bf527-0.0
  15#define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_PARA
  16
  17
  18/*
  19 * Clock Settings
  20 *      CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
  21 *      SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
  22 */
  23/* CONFIG_CLKIN_HZ is any value in Hz                                   */
  24#define CONFIG_CLKIN_HZ                 25000000
  25/* CLKIN_HALF controls the DF bit in PLL_CTL      0 = CLKIN             */
  26/*                                                1 = CLKIN / 2         */
  27#define CONFIG_CLKIN_HALF               0
  28/* PLL_BYPASS controls the BYPASS bit in PLL_CTL  0 = do not bypass     */
  29/*                                                1 = bypass PLL        */
  30#define CONFIG_PLL_BYPASS               0
  31/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL              */
  32/* Values can range from 0-63 (where 0 means 64)                        */
  33#define CONFIG_VCO_MULT                 21
  34/* CCLK_DIV controls the core clock divider                             */
  35/* Values can be 1, 2, 4, or 8 ONLY                                     */
  36#define CONFIG_CCLK_DIV                 1
  37/* SCLK_DIV controls the system clock divider                           */
  38/* Values can range from 1-15                                           */
  39#define CONFIG_SCLK_DIV                 4
  40
  41
  42/*
  43 * Memory Settings
  44 */
  45#define CONFIG_MEM_ADD_WDTH     10
  46#define CONFIG_MEM_SIZE         64
  47
  48#define CONFIG_EBIU_SDRRC_VAL   0x03F6
  49#define CONFIG_EBIU_SDGCTL_VAL  (SCTLE | CL_3 | PASR_ALL | TRAS_6 | TRP_3 | TRCD_3 | TWR_2 | PSS)
  50
  51#define CONFIG_EBIU_AMGCTL_VAL  (AMCKEN | AMBEN_ALL)
  52#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_15 | B1RAT_15 | B1HT_3 | B1RDYPOL | B0WAT_15 | B0RAT_15 | B0HT_3 | B0RDYPOL)
  53#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_15 | B3RAT_15 | B3HT_3 | B3RDYPOL | B2WAT_15 | B2RAT_15 | B2HT_3 | B2RDYPOL)
  54
  55#define CONFIG_SYS_MONITOR_LEN  (768 * 1024)
  56#define CONFIG_SYS_MALLOC_LEN   (640 * 1024)
  57
  58
  59/*
  60 * NAND Settings
  61 * (can't be used same time as ethernet)
  62 */
  63#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND)
  64# define CONFIG_BFIN_NFC
  65# define CONFIG_BFIN_NFC_BOOTROM_ECC
  66#endif
  67#ifdef CONFIG_BFIN_NFC
  68#define CONFIG_BFIN_NFC_CTL_VAL 0x0033
  69#define CONFIG_DRIVER_NAND_BFIN
  70#define CONFIG_SYS_NAND_BASE            0 /* not actually used */
  71#define CONFIG_SYS_MAX_NAND_DEVICE      1
  72#endif
  73
  74
  75/*
  76 * Network Settings
  77 */
  78#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) && \
  79    !defined(__ADSPBF524__) && !defined(__ADSPBF525__) && !defined(CONFIG_BFIN_NFC)
  80#define ADI_CMDS_NETWORK        1
  81#define CONFIG_BFIN_MAC
  82#define CONFIG_RMII
  83#define CONFIG_NETCONSOLE       1
  84#endif
  85#define CONFIG_HOSTNAME         bf527-ezkit
  86
  87/*
  88 * Flash Settings
  89 */
  90#define CONFIG_FLASH_CFI_DRIVER
  91#define CONFIG_SYS_FLASH_BASE           0x20000000
  92#define CONFIG_SYS_FLASH_CFI
  93#define CONFIG_SYS_FLASH_PROTECTION
  94#define CONFIG_SYS_MAX_FLASH_BANKS      1
  95#define CONFIG_SYS_MAX_FLASH_SECT       259
  96
  97
  98/*
  99 * SPI Settings
 100 */
 101#define CONFIG_BFIN_SPI
 102#define CONFIG_ENV_SPI_MAX_HZ   30000000
 103#define CONFIG_SF_DEFAULT_SPEED 30000000
 104#define CONFIG_SPI_FLASH_STMICRO
 105
 106
 107/*
 108 * Env Storage Settings
 109 */
 110#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
 111#define CONFIG_ENV_IS_IN_SPI_FLASH
 112#define CONFIG_ENV_OFFSET       0x10000
 113#define CONFIG_ENV_SIZE         0x2000
 114#define CONFIG_ENV_SECT_SIZE    0x10000
 115#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
 116#elif (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND)
 117#define CONFIG_ENV_IS_IN_NAND
 118#define CONFIG_ENV_OFFSET       0x40000
 119#define CONFIG_ENV_SIZE         0x20000
 120#else
 121#define CONFIG_ENV_IS_IN_FLASH
 122#define CONFIG_ENV_OFFSET       0x4000
 123#define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
 124#define CONFIG_ENV_SIZE         0x2000
 125#define CONFIG_ENV_SECT_SIZE    0x2000
 126#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
 127#endif
 128
 129
 130/*
 131 * I2C Settings
 132 */
 133#define CONFIG_SYS_I2C
 134#define CONFIG_SYS_I2C_ADI
 135
 136
 137/*
 138 * USB Settings
 139 */
 140#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__)
 141#define CONFIG_USB
 142#define CONFIG_USB_MUSB_HCD
 143#define CONFIG_USB_BLACKFIN
 144#define CONFIG_USB_STORAGE
 145#define CONFIG_USB_MUSB_TIMEOUT 100000
 146#endif
 147
 148/* Don't waste time transferring a logo over the UART */
 149#if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_UART)
 150/*# define CONFIG_VIDEO*/
 151#endif
 152
 153/*
 154 * Video Settings
 155 */
 156#ifdef CONFIG_VIDEO
 157#ifdef CONFIG_BF527_EZKIT_REV_2_1
 158# define CONFIG_LQ035Q1_SPI_BUS 0
 159# define CONFIG_LQ035Q1_SPI_CS  7
 160# define CONFIG_LQ035Q1_USE_RGB565_8_BIT_PPI
 161#else
 162# define CONFIG_LQ035Q1_USE_RGB888_8_BIT_PPI
 163#endif
 164
 165#ifdef CONFIG_LQ035Q1_USE_RGB565_8_BIT_PPI
 166# define EASYLOGO_HEADER <asm/bfin_logo_rgb565_230x230_lzma.h>
 167#else
 168# define EASYLOGO_HEADER <asm/bfin_logo_230x230_lzma.h>
 169#endif
 170#endif /* CONFIG_VIDEO */
 171
 172/*
 173 * Misc Settings
 174 */
 175#define CONFIG_MISC_INIT_R
 176#define CONFIG_RTC_BFIN
 177#define CONFIG_UART_CONSOLE     1
 178
 179/*
 180 * Pull in common ADI header for remaining command/environment setup
 181 */
 182#include <configs/bfin_adi_common.h>
 183
 184#endif
 185