1/* 2 * U-boot - Configuration file for CM-BF537U board 3 */ 4 5#ifndef __CONFIG_CM_BF537U_H__ 6#define __CONFIG_CM_BF537U_H__ 7 8#include <asm/config-pre.h> 9 10 11/* 12 * Processor Settings 13 */ 14#define CONFIG_BFIN_CPU bf537-0.2 15#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS 16 17 18/* 19 * Clock Settings 20 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV 21 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV 22 */ 23/* CONFIG_CLKIN_HZ is any value in Hz */ 24#define CONFIG_CLKIN_HZ 30000000 25/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ 26/* 1 = CLKIN / 2 */ 27#define CONFIG_CLKIN_HALF 0 28/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ 29/* 1 = bypass PLL */ 30#define CONFIG_PLL_BYPASS 0 31/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ 32/* Values can range from 0-63 (where 0 means 64) */ 33#define CONFIG_VCO_MULT 18 34/* CCLK_DIV controls the core clock divider */ 35/* Values can be 1, 2, 4, or 8 ONLY */ 36#define CONFIG_CCLK_DIV 1 37/* SCLK_DIV controls the system clock divider */ 38/* Values can range from 1-15 */ 39#define CONFIG_SCLK_DIV 5 40/* Core voltage */ 41#define CONFIG_VR_CTL_VAL (VLEV_110 | GAIN_20 | FREQ_1000) 42 43 44/* 45 * Memory Settings 46 */ 47#define CONFIG_MEM_ADD_WDTH 9 48#define CONFIG_MEM_SIZE 32 49 50#define CONFIG_EBIU_SDRRC_VAL 0x3f8 51#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd 52 53#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL) 54#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) 55#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) 56 57#define CONFIG_SYS_MONITOR_LEN (768 * 1024) 58#define CONFIG_SYS_MALLOC_LEN (128 * 1024) 59 60 61/* 62 * Network Settings 63 */ 64#ifndef __ADSPBF534__ 65#define ADI_CMDS_NETWORK 1 66#define CONFIG_SMC911X 1 67#define CONFIG_SMC911X_BASE 0x20308000 68#define CONFIG_SMC911X_16_BIT 69#define CONFIG_NETCONSOLE 1 70#endif 71#define CONFIG_HOSTNAME cm-bf537u 72 73/* 74 * Flash Settings 75 */ 76#define CONFIG_FLASH_CFI_DRIVER 77#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS 78#define CONFIG_SYS_FLASH_BASE 0x20000000 79#define CONFIG_SYS_FLASH_CFI 80#define CONFIG_SYS_FLASH_PROTECTION 81#define CONFIG_SYS_MAX_FLASH_BANKS 1 82#define CONFIG_SYS_MAX_FLASH_SECT 35 83 84 85/* 86 * SPI Settings 87 */ 88#define CONFIG_BFIN_SPI 89#define CONFIG_ENV_SPI_MAX_HZ 30000000 90 91 92/* 93 * Env Storage Settings 94 */ 95#define CONFIG_ENV_IS_IN_FLASH 1 96#define CONFIG_ENV_OFFSET 0x8000 97#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) 98#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 99#define CONFIG_ENV_SECT_SIZE 0x8000 100#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) 101#define ENV_IS_EMBEDDED 102#endif 103#ifdef ENV_IS_EMBEDDED 104/* WARNING - the following is hand-optimized to fit within 105 * the sector before the environment sector. If it throws 106 * an error during compilation remove an object here to get 107 * it linked after the configuration sector. 108 */ 109# define LDS_BOARD_TEXT \ 110 arch/blackfin/lib/built-in.o (.text*); \ 111 arch/blackfin/cpu/built-in.o (.text*); \ 112 . = DEFINED(env_offset) ? env_offset : .; \ 113 common/env_embedded.o (.text*); 114#endif 115 116 117/* 118 * I2C Settings 119 */ 120#define CONFIG_SYS_I2C 121#define CONFIG_SYS_I2C_ADI 122 123 124/* 125 * SPI_MMC Settings 126 */ 127#define CONFIG_MMC 128#define CONFIG_GENERIC_MMC 129#define CONFIG_MMC_SPI 130 131/* 132 * Misc Settings 133 */ 134#define CONFIG_BAUDRATE 115200 135#define CONFIG_MISC_INIT_R 136#define CONFIG_RTC_BFIN 137#define CONFIG_UART_CONSOLE 0 138#define CONFIG_BOOTCOMMAND "run flashboot" 139#define FLASHBOOT_ENV_SETTINGS \ 140 "flashboot=flread 20040000 1000000 300000;" \ 141 "bootm 0x1000000\0" 142#define CONFIG_BOARD_SIZE_LIMIT $$((384 * 1024)) 143 144/* 145 * Pull in common ADI header for remaining command/environment setup 146 */ 147#include <configs/bfin_adi_common.h> 148 149#endif 150