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16
17#ifndef __CONFIG_H
18#define __CONFIG_H
19
20
21
22
23#define CONFIG_OMAP
24#define CONFIG_OMAP_GPIO
25#define CONFIG_CMD_GPIO
26#define CONFIG_CM_T3X
27#define CONFIG_OMAP_COMMON
28#define CONFIG_SYS_GENERIC_BOARD
29
30#define CONFIG_ARM_ERRATA_454179
31#define CONFIG_ARM_ERRATA_430973
32#define CONFIG_ARM_ERRATA_621766
33
34#define CONFIG_SDRC
35
36#include <asm/arch/cpu.h>
37#include <asm/arch/omap.h>
38
39
40
41
42#define CONFIG_DISPLAY_CPUINFO
43#define CONFIG_DISPLAY_BOARDINFO
44
45
46#define V_OSCK 26000000
47#define V_SCLK (V_OSCK >> 1)
48
49#define CONFIG_MISC_INIT_R
50
51#define CONFIG_OF_LIBFDT 1
52
53#define CONFIG_CMDLINE_TAG
54#define CONFIG_SETUP_MEMORY_TAGS
55#define CONFIG_INITRD_TAG
56#define CONFIG_REVISION_TAG
57#define CONFIG_SERIAL_TAG
58
59
60
61
62#define CONFIG_ENV_SIZE (16 << 10)
63
64#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
65
66
67
68
69
70
71
72
73#define V_NS16550_CLK 48000000
74
75#define CONFIG_SYS_NS16550
76#define CONFIG_SYS_NS16550_SERIAL
77#define CONFIG_SYS_NS16550_REG_SIZE (-4)
78#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
79
80
81
82
83#define CONFIG_CONS_INDEX 3
84#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
85#define CONFIG_SERIAL3 3
86
87
88#define CONFIG_ENV_OVERWRITE
89#define CONFIG_BAUDRATE 115200
90#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
91 115200}
92
93#define CONFIG_GENERIC_MMC
94#define CONFIG_MMC
95#define CONFIG_OMAP_HSMMC
96#define CONFIG_DOS_PARTITION
97
98
99#define CONFIG_USB_OMAP3
100#define CONFIG_USB_EHCI
101#define CONFIG_USB_EHCI_OMAP
102#define CONFIG_USB_STORAGE
103#define CONFIG_USB_MUSB_UDC
104#define CONFIG_TWL4030_USB
105#define CONFIG_CMD_USB
106
107
108#define CONFIG_USB_DEVICE
109#define CONFIG_USB_TTY
110#define CONFIG_SYS_CONSOLE_IS_IN_ENV
111
112
113#define CONFIG_CMD_CACHE
114#define CONFIG_CMD_EXT2
115#define CONFIG_CMD_FAT
116#define CONFIG_CMD_MTDPARTS
117#define CONFIG_MTD_DEVICE
118#define CONFIG_MTD_PARTITIONS
119#define MTDIDS_DEFAULT "nand0=nand"
120#define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
121 "1920k(u-boot),256k(u-boot-env),"\
122 "4m(kernel),-(fs)"
123
124#define CONFIG_CMD_I2C
125#define CONFIG_CMD_MMC
126#define CONFIG_CMD_NAND
127#define CONFIG_CMD_DHCP
128#define CONFIG_CMD_PING
129
130
131#define CONFIG_SYS_NO_FLASH
132#define CONFIG_SYS_I2C
133#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
134#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
135#define CONFIG_SYS_I2C_OMAP34XX
136#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
137#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
138#define CONFIG_SYS_I2C_EEPROM_BUS 0
139#define CONFIG_I2C_MULTI_BUS
140
141
142
143
144#define CONFIG_TWL4030_POWER
145#define CONFIG_TWL4030_LED
146
147
148
149
150#define CONFIG_NAND_OMAP_GPMC
151#define CONFIG_SYS_NAND_ADDR NAND_BASE
152
153#define CONFIG_SYS_NAND_BASE NAND_BASE
154
155
156#define CONFIG_SYS_MAX_NAND_DEVICE 1
157
158
159
160#define CONFIG_BOOTDELAY 3
161#define CONFIG_ZERO_BOOTDELAY_CHECK
162
163#define CONFIG_EXTRA_ENV_SETTINGS \
164 "loadaddr=0x82000000\0" \
165 "usbtty=cdc_acm\0" \
166 "console=ttyO2,115200n8\0" \
167 "mpurate=500\0" \
168 "vram=12M\0" \
169 "dvimode=1024x768MR-16@60\0" \
170 "defaultdisplay=dvi\0" \
171 "mmcdev=0\0" \
172 "mmcroot=/dev/mmcblk0p2 rw\0" \
173 "mmcrootfstype=ext4 rootwait\0" \
174 "nandroot=/dev/mtdblock4 rw\0" \
175 "nandrootfstype=ubifs\0" \
176 "mmcargs=setenv bootargs console=${console} " \
177 "mpurate=${mpurate} " \
178 "vram=${vram} " \
179 "omapfb.mode=dvi:${dvimode} " \
180 "omapdss.def_disp=${defaultdisplay} " \
181 "root=${mmcroot} " \
182 "rootfstype=${mmcrootfstype}\0" \
183 "nandargs=setenv bootargs console=${console} " \
184 "mpurate=${mpurate} " \
185 "vram=${vram} " \
186 "omapfb.mode=dvi:${dvimode} " \
187 "omapdss.def_disp=${defaultdisplay} " \
188 "root=${nandroot} " \
189 "rootfstype=${nandrootfstype}\0" \
190 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
191 "bootscript=echo Running bootscript from mmc ...; " \
192 "source ${loadaddr}\0" \
193 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
194 "mmcboot=echo Booting from mmc ...; " \
195 "run mmcargs; " \
196 "bootm ${loadaddr}\0" \
197 "nandboot=echo Booting from nand ...; " \
198 "run nandargs; " \
199 "nand read ${loadaddr} 2a0000 400000; " \
200 "bootm ${loadaddr}\0" \
201
202#define CONFIG_CMD_BOOTZ
203#define CONFIG_BOOTCOMMAND \
204 "mmc dev ${mmcdev}; if mmc rescan; then " \
205 "if run loadbootscript; then " \
206 "run bootscript; " \
207 "else " \
208 "if run loaduimage; then " \
209 "run mmcboot; " \
210 "else run nandboot; " \
211 "fi; " \
212 "fi; " \
213 "else run nandboot; fi"
214
215
216
217
218#define CONFIG_AUTO_COMPLETE
219#define CONFIG_CMDLINE_EDITING
220#define CONFIG_TIMESTAMP
221#define CONFIG_SYS_AUTOLOAD "no"
222#define CONFIG_SYS_LONGHELP
223#define CONFIG_SYS_HUSH_PARSER
224#define CONFIG_SYS_CBSIZE 256
225
226#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
227 sizeof(CONFIG_SYS_PROMPT) + 16)
228#define CONFIG_SYS_MAXARGS 16
229
230#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
231
232#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
233
234#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
235 0x01F00000)
236
237#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
238
239
240
241
242
243
244
245#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
246#define CONFIG_SYS_PTV 2
247
248
249
250
251#define CONFIG_NR_DRAM_BANKS 1
252#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
253
254
255
256
257
258
259
260#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
261#define CONFIG_SYS_MONITOR_LEN (256 << 10)
262
263#define CONFIG_ENV_IS_IN_NAND
264#define SMNAND_ENV_OFFSET 0x260000
265#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
266#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
267
268#if defined(CONFIG_CMD_NET)
269#define CONFIG_SMC911X
270#define CONFIG_SMC911X_32_BIT
271#define CM_T3X_SMC911X_BASE 0x2C000000
272#define SB_T35_SMC911X_BASE (CM_T3X_SMC911X_BASE + (16 << 20))
273#define CONFIG_SMC911X_BASE CM_T3X_SMC911X_BASE
274#endif
275
276
277#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
278#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
279#define CONFIG_SYS_INIT_RAM_SIZE 0x800
280#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
281 CONFIG_SYS_INIT_RAM_SIZE - \
282 GENERATED_GBL_DATA_SIZE)
283
284
285#define CONFIG_STATUS_LED
286#define CONFIG_BOARD_SPECIFIC_LED
287#define CONFIG_GPIO_LED
288#define GREEN_LED_GPIO 186
289#define GREEN_LED_DEV 0
290#define STATUS_LED_BIT GREEN_LED_GPIO
291#define STATUS_LED_STATE STATUS_LED_ON
292#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
293#define STATUS_LED_BOOT GREEN_LED_DEV
294
295#define CONFIG_SPLASHIMAGE_GUARD
296
297
298#ifdef CONFIG_STATUS_LED
299#define CONFIG_OMAP3_GPIO_6
300#endif
301
302
303#define CONFIG_OMAP3_GPIO_2
304#define CONFIG_OMAP3_GPIO_5
305#define CONFIG_VIDEO_OMAP3
306#define LCD_BPP LCD_COLOR16
307
308#define CONFIG_LCD
309#define CONFIG_SPLASH_SCREEN
310#define CONFIG_SPLASH_SOURCE
311#define CONFIG_CMD_BMP
312#define CONFIG_BMP_16BPP
313#define CONFIG_SCF0403_LCD
314
315#define CONFIG_OMAP3_SPI
316
317
318#define CONFIG_SPL_FRAMEWORK
319#define CONFIG_SPL_NAND_SIMPLE
320
321#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
322#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200
323#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
324#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
325
326#define CONFIG_SPL_BOARD_INIT
327#define CONFIG_SPL_LIBCOMMON_SUPPORT
328#define CONFIG_SPL_LIBDISK_SUPPORT
329#define CONFIG_SPL_I2C_SUPPORT
330#define CONFIG_SPL_LIBGENERIC_SUPPORT
331#define CONFIG_SPL_MMC_SUPPORT
332#define CONFIG_SPL_FAT_SUPPORT
333#define CONFIG_SPL_SERIAL_SUPPORT
334#define CONFIG_SPL_NAND_SUPPORT
335#define CONFIG_SPL_NAND_BASE
336#define CONFIG_SPL_NAND_DRIVERS
337#define CONFIG_SPL_NAND_ECC
338#define CONFIG_SPL_GPIO_SUPPORT
339#define CONFIG_SPL_POWER_SUPPORT
340#define CONFIG_SPL_OMAP3_ID_NAND
341#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
342
343
344#define CONFIG_SYS_NAND_5_ADDR_CYCLE
345#define CONFIG_SYS_NAND_PAGE_COUNT 64
346#define CONFIG_SYS_NAND_PAGE_SIZE 2048
347#define CONFIG_SYS_NAND_OOBSIZE 64
348#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
349#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
350
351
352
353
354#define CONFIG_SYS_NAND_ECCPOS { 1, 2, 3, 4, 5, 6, 7, 8, 9, \
355 10, 11, 12 }
356#define CONFIG_SYS_NAND_ECCSIZE 512
357#define CONFIG_SYS_NAND_ECCBYTES 3
358#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
359
360#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
361#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
362
363#define CONFIG_SPL_TEXT_BASE 0x40200800
364#define CONFIG_SPL_MAX_SIZE (54 * 1024)
365
366
367
368
369
370
371#define CONFIG_SYS_TEXT_BASE 0x80008000
372#define CONFIG_SPL_BSS_START_ADDR 0x80100000
373#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
374
375#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
376#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
377
378#endif
379