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13#include <common.h>
14#include <mpc5xxx.h>
15#include <miiphy.h>
16#include <libfdt.h>
17
18#if defined(CONFIG_STATUS_LED)
19#include <status_led.h>
20#endif
21
22
23struct init_elem {
24 unsigned long addr;
25 unsigned len;
26 char *data;
27 } init_seq[] = {
28 {0x500003F2, 2, "\x86\x00"},
29 {0x500003F0, 2, "\x00\x00"},
30 {0x500003EC, 4, "\x00\x80\xc1\x52"},
31 };
32
33
34
35
36static void kollmorgen_init(void)
37{
38 unsigned i, j;
39 vu_char *p;
40
41 for (i = 0; i < sizeof(init_seq) / sizeof(struct init_elem); ++i) {
42 p = (vu_char *)init_seq[i].addr;
43 for (j = 0; j < init_seq[i].len; ++j)
44 *(p + j) = *(init_seq[i].data + j);
45 }
46
47 printf("DPR: Kollmorgen DPR initialized\n");
48}
49
50
51
52
53
54int board_early_init_r(void)
55{
56
57 *(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25);
58 *(vu_long *)MPC5XXX_ADDECR |= (1 << 16);
59
60
61 kollmorgen_init();
62
63 return 0;
64}
65
66
67
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69
70
71
72
73void reset_phy(void)
74{
75 unsigned short mode_control;
76
77 miiphy_read("FEC", CONFIG_PHY_ADDR, 0x15, &mode_control);
78 miiphy_write("FEC", CONFIG_PHY_ADDR, 0x15,
79 mode_control & 0xfffe);
80 return;
81}
82
83#ifndef CONFIG_SYS_RAMBOOT
84
85
86
87static void sdram_start(int hi_addr)
88{
89 long hi_addr_bit = hi_addr ? 0x01000000 : 0;
90
91
92 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 |
93 hi_addr_bit;
94
95
96 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 |
97 hi_addr_bit;
98
99
100 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 |
101 hi_addr_bit;
102
103
104 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 |
105 hi_addr_bit;
106
107
108 *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
109
110
111 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
112}
113#endif
114
115
116
117
118
119phys_size_t initdram(int board_type)
120{
121 ulong dramsize = 0;
122#ifndef CONFIG_SYS_RAMBOOT
123 ulong test1, test2;
124
125
126
127
128
129 *(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04;
130
131
132 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e;
133 *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000;
134
135
136 *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
137 *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
138
139 sdram_start(0);
140 test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
141 sdram_start(1);
142 test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
143 if (test1 > test2) {
144 sdram_start(0);
145 dramsize = test1;
146 } else {
147 dramsize = test2;
148 }
149
150
151 if (dramsize < (1 << 20))
152 dramsize = 0;
153
154
155 if (dramsize > 0) {
156 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 +
157 __builtin_ffs(dramsize >> 20) - 1;
158 } else {
159 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0;
160 }
161
162
163 *(vu_long *) MPC5XXX_SDRAM_CS1CFG = dramsize;
164
165#else
166
167 dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
168 if (dramsize >= 0x13)
169 dramsize = (1 << (dramsize - 0x13)) << 20;
170 else
171 dramsize = 0;
172#endif
173
174
175 return dramsize;
176}
177
178
179int checkboard(void)
180{
181 uchar rev = *(vu_char *)CPLD_REV_REGISTER;
182 printf("Board: Promess Motion-PRO board (CPLD rev. 0x%02x)\n", rev);
183 return 0;
184}
185
186
187#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
188int ft_board_setup(void *blob, bd_t *bd)
189{
190 ft_cpu_setup(blob, bd);
191
192 return 0;
193}
194#endif
195
196
197#if defined(CONFIG_STATUS_LED)
198void __led_init(led_id_t regaddr, int state)
199{
200 *((vu_long *) regaddr) |= ENABLE_GPIO_OUT;
201
202 if (state == STATUS_LED_ON)
203 *((vu_long *) regaddr) |= LED_ON;
204 else
205 *((vu_long *) regaddr) &= ~LED_ON;
206}
207
208void __led_set(led_id_t regaddr, int state)
209{
210 if (state == STATUS_LED_ON)
211 *((vu_long *) regaddr) |= LED_ON;
212 else
213 *((vu_long *) regaddr) &= ~LED_ON;
214}
215
216void __led_toggle(led_id_t regaddr)
217{
218 *((vu_long *) regaddr) ^= LED_ON;
219}
220#endif
221