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11#ifndef __CONFIG_TRATS2_H
12#define __CONFIG_TRATS2_H
13
14#include <configs/exynos4-common.h>
15
16#define CONFIG_TIZEN
17
18#define CONFIG_SYS_L2CACHE_OFF
19#ifndef CONFIG_SYS_L2CACHE_OFF
20#define CONFIG_SYS_L2_PL310
21#define CONFIG_SYS_PL310_BASE 0x10502000
22#endif
23
24
25#define CONFIG_NR_DRAM_BANKS 4
26#define CONFIG_SYS_SDRAM_BASE 0x40000000
27#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
28#define SDRAM_BANK_SIZE (256 << 20)
29
30#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
31#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
32#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
33
34#define CONFIG_SYS_TEXT_BASE 0x43e00000
35
36
37#define CONFIG_SERIAL2
38#define CONFIG_BAUDRATE 115200
39
40
41#define CONFIG_SYS_CONSOLE_INFO_QUIET
42#define CONFIG_SYS_CONSOLE_IS_IN_ENV
43
44#define CONFIG_FIT
45#define CONFIG_FIT_VERBOSE
46#define CONFIG_BOOTARGS "Please use defined boot"
47#define CONFIG_BOOTCOMMAND "run autoboot"
48#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
49
50#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
51 - GENERATED_GBL_DATA_SIZE)
52
53#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20)
54
55#define CONFIG_SYS_MONITOR_BASE 0x00000000
56
57#define CONFIG_ENV_IS_IN_MMC
58#define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
59#define CONFIG_ENV_SIZE 4096
60#define CONFIG_ENV_OFFSET ((32 - 4) << 10)
61
62#define CONFIG_ENV_OVERWRITE
63
64#define CONFIG_ENV_VARS_UBOOT_CONFIG
65#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
66
67
68#define PARTS_CSA "csa-mmc"
69#define PARTS_BOOT "boot"
70#define PARTS_QBOOT "qboot"
71#define PARTS_CSC "csc"
72#define PARTS_ROOT "platform"
73#define PARTS_DATA "data"
74#define PARTS_UMS "ums"
75
76#define PARTS_DEFAULT \
77 "uuid_disk=${uuid_gpt_disk};" \
78 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
79 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
80 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
81 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
82 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
83 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
84 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
85
86#define CONFIG_DFU_ALT \
87 "u-boot raw 0x80 0x800;" \
88 "/uImage ext4 0 2;" \
89 "/modem.bin ext4 0 2;" \
90 "/exynos4412-trats2.dtb ext4 0 2;" \
91 ""PARTS_CSA" part 0 1;" \
92 ""PARTS_BOOT" part 0 2;" \
93 ""PARTS_QBOOT" part 0 3;" \
94 ""PARTS_CSC" part 0 4;" \
95 ""PARTS_ROOT" part 0 5;" \
96 ""PARTS_DATA" part 0 6;" \
97 ""PARTS_UMS" part 0 7;" \
98 "params.bin raw 0x38 0x8;" \
99 "/Image.itb ext4 0 2\0"
100
101#define CONFIG_EXTRA_ENV_SETTINGS \
102 "bootk=" \
103 "run loaduimage;" \
104 "if run loaddtb; then " \
105 "bootm 0x40007FC0 - ${fdtaddr};" \
106 "fi;" \
107 "bootm 0x40007FC0;\0" \
108 "updatebackup=" \
109 "mmc dev 0 2; mmc write 0x51000000 0 0x800;" \
110 " mmc dev 0 0\0" \
111 "updatebootb=" \
112 "mmc read 0x51000000 0x80 0x800; run updatebackup\0" \
113 "mmcboot=" \
114 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
115 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
116 "run bootk\0" \
117 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
118 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
119 "verify=n\0" \
120 "rootfstype=ext4\0" \
121 "console=" CONFIG_DEFAULT_CONSOLE \
122 "kernelname=uImage\0" \
123 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \
124 "${kernelname}\0" \
125 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
126 "${fdtfile}\0" \
127 "mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \
128 "mmcbootpart=2\0" \
129 "mmcrootpart=5\0" \
130 "opts=always_resume=1\0" \
131 "partitions=" PARTS_DEFAULT \
132 "dfu_alt_info=" CONFIG_DFU_ALT \
133 "uartpath=ap\0" \
134 "usbpath=ap\0" \
135 "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
136 "consoleoff=set console console=ram; save; reset\0" \
137 "spladdr=0x40000100\0" \
138 "splsize=0x200\0" \
139 "splfile=falcon.bin\0" \
140 "spl_export=" \
141 "setexpr spl_imgsize ${splsize} + 8 ;" \
142 "setenv spl_imgsize 0x${spl_imgsize};" \
143 "setexpr spl_imgaddr ${spladdr} - 8 ;" \
144 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
145 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
146 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
147 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
148 "spl export atags 0x40007FC0;" \
149 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
150 "mw.l ${spl_addr_tmp} ${splsize};" \
151 "ext4write mmc ${mmcdev}:${mmcbootpart}" \
152 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
153 "setenv spl_imgsize;" \
154 "setenv spl_imgaddr;" \
155 "setenv spl_addr_tmp;\0" \
156 CONFIG_EXTRA_ENV_ITB \
157 "fdtaddr=40800000\0" \
158
159
160#define CONFIG_RANDOM_UUID
161
162
163#include <asm/arch/gpio.h>
164
165#define CONFIG_CMD_I2C
166
167#define CONFIG_SYS_I2C
168#define CONFIG_SYS_I2C_S3C24X0
169#define CONFIG_SYS_I2C_S3C24X0_SPEED 100000
170#define CONFIG_SYS_I2C_S3C24X0_SLAVE 0
171#define CONFIG_MAX_I2C_NUM 8
172#define CONFIG_SYS_I2C_SOFT
173#define CONFIG_SYS_I2C_SOFT_SPEED 50000
174#define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
175#define I2C_SOFT_DECLARATIONS2
176#define CONFIG_SYS_I2C_SOFT_SPEED_2 50000
177#define CONFIG_SYS_I2C_SOFT_SLAVE_2 0x00
178#define CONFIG_SOFT_I2C_READ_REPEATED_START
179#define CONFIG_SYS_I2C_INIT_BOARD
180
181#ifndef __ASSEMBLY__
182int get_soft_i2c_scl_pin(void);
183int get_soft_i2c_sda_pin(void);
184#endif
185#define CONFIG_SOFT_I2C_GPIO_SCL get_soft_i2c_scl_pin()
186#define CONFIG_SOFT_I2C_GPIO_SDA get_soft_i2c_sda_pin()
187
188
189#define CONFIG_POWER
190#define CONFIG_POWER_I2C
191#define CONFIG_POWER_MAX77686
192#define CONFIG_POWER_PMIC_MAX77693
193#define CONFIG_POWER_MUIC_MAX77693
194#define CONFIG_POWER_FG_MAX77693
195#define CONFIG_POWER_BATTERY_TRATS2
196
197
198#define CONFIG_EXYNOS_ACE_SHA
199#define CONFIG_LIB_HW_RAND
200
201
202#define CONFIG_MISC_COMMON
203
204#define CONFIG_MISC_INIT_R
205
206
207#define CONFIG_LCD_MENU
208#define CONFIG_LCD_MENU_BOARD
209
210
211#ifndef __ASSEMBLY__
212#include <power/max77686_pmic.h>
213
214#define KEY_PWR_PMIC_NAME "MAX77686_PMIC"
215#define KEY_PWR_STATUS_REG MAX77686_REG_PMIC_STATUS1
216#define KEY_PWR_STATUS_MASK (1 << 0)
217#define KEY_PWR_INTERRUPT_REG MAX77686_REG_PMIC_INT1
218#define KEY_PWR_INTERRUPT_MASK (1 << 1)
219
220#define KEY_VOL_UP_GPIO EXYNOS4X12_GPIO_X22
221#define KEY_VOL_DOWN_GPIO EXYNOS4X12_GPIO_X33
222#endif
223
224
225#define LCD_BPP LCD_COLOR16
226#define CONFIG_SYS_WHITE_ON_BLACK
227
228
229#define CONFIG_EXYNOS_FB
230#define CONFIG_LCD
231#define CONFIG_CMD_BMP
232#define CONFIG_BMP_16BPP
233#define CONFIG_FB_ADDR 0x52504000
234#define CONFIG_S6E8AX0
235#define CONFIG_EXYNOS_MIPI_DSIM
236#define CONFIG_VIDEO_BMP_GZIP
237#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
238
239#endif
240
