LXR uboot/arch/arm/include/asm/arch-rockchip/sdram.h

   1/*
   2 * Copyright (c) 2015 Google, Inc
   3 *
   4 * Copyright 2014 Rockchip Inc.
   5 *
   6 * SPDX-License-Identifier:     GPL-2.0
   7 */
   8
   9#ifndef _ASM_ARCH_RK3288_SDRAM_H__
  10#define _ASM_ARCH_RK3288_SDRAM_H__
  11
  12enum {
  13        DDR3 = 3,
  14        LPDDR3 = 6,
  15        UNUSED = 0xFF,
  16};
  17
  18struct rk3288_sdram_channel {
  19        u8 rank;
  20        u8 col;
  21        u8 bk;
  22        u8 bw;
  23        u8 dbw;
  24        u8 row_3_4;
  25        u8 cs0_row;
  26        u8 cs1_row;
  27};
  28
  29struct rk3288_sdram_pctl_timing {
  30        u32 togcnt1u;
  31        u32 tinit;
  32        u32 trsth;
  33        u32 togcnt100n;
  34        u32 trefi;
  35        u32 tmrd;
  36        u32 trfc;
  37        u32 trp;
  38        u32 trtw;
  39        u32 tal;
  40        u32 tcl;
  41        u32 tcwl;
  42        u32 tras;
  43        u32 trc;
  44        u32 trcd;
  45        u32 trrd;
  46        u32 trtp;
  47        u32 twr;
  48        u32 twtr;
  49        u32 texsr;
  50        u32 txp;
  51        u32 txpdll;
  52        u32 tzqcs;
  53        u32 tzqcsi;
  54        u32 tdqs;
  55        u32 tcksre;
  56        u32 tcksrx;
  57        u32 tcke;
  58        u32 tmod;
  59        u32 trstl;
  60        u32 tzqcl;
  61        u32 tmrr;
  62        u32 tckesr;
  63        u32 tdpd;
  64};
  65check_member(rk3288_sdram_pctl_timing, tdpd, 0x144 - 0xc0);
  66
  67struct rk3288_sdram_phy_timing {
  68        u32 dtpr0;
  69        u32 dtpr1;
  70        u32 dtpr2;
  71        u32 mr[4];
  72};
  73
  74struct rk3288_base_params {
  75        u32 noc_timing;
  76        u32 noc_activate;
  77        u32 ddrconfig;
  78        u32 ddr_freq;
  79        u32 dramtype;
  80        u32 stride;
  81        u32 odt;
  82};
  83
  84struct rk3288_sdram_params {
  85        struct rk3288_sdram_channel ch[2];
  86        struct rk3288_sdram_pctl_timing pctl_timing;
  87        struct rk3288_sdram_phy_timing phy_timing;
  88        struct rk3288_base_params base;
  89        int num_channels;
  90};
  91
  92#endif
  93