LXR uboot/board/freescale/p1_p2_rdb

   1/*
   2 * Copyright 2013 Freescale Semiconductor, Inc.
   3 *
   4 * SPDX-License-Identifier:     GPL-2.0+
   5 */
   6
   7#include <common.h>
   8#include <console.h>
   9#include <ns16550.h>
  10#include <malloc.h>
  11#include <mmc.h>
  12#include <nand.h>
  13#include <i2c.h>
  14#include <fsl_esdhc.h>
  15#include <spi_flash.h>
  16
  17DECLARE_GLOBAL_DATA_PTR;
  18
  19static const u32 sysclk_tbl[] = {
  20        66666000, 7499900, 83332500, 8999900,
  21        99999000, 11111000, 12499800, 13333200
  22};
  23
  24phys_size_t get_effective_memsize(void)
  25{
  26        return CONFIG_SYS_L2_SIZE;
  27}
  28
  29void board_init_f(ulong bootflag)
  30{
  31        u32 plat_ratio, bus_clk;
  32        ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
  33
  34        console_init_f();
  35
  36        /* Set pmuxcr to allow both i2c1 and i2c2 */
  37        setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000);
  38        setbits_be32(&gur->pmuxcr,
  39                     in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
  40
  41        /* Read back the register to synchronize the write. */
  42        in_be32(&gur->pmuxcr);
  43
  44#ifdef CONFIG_SPL_SPI_BOOT
  45        clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA);
  46#endif
  47
  48        /* initialize selected port with appropriate baud rate */
  49        plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
  50        plat_ratio >>= 1;
  51        bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
  52        gd->bus_clk = bus_clk;
  53
  54        NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
  55                     bus_clk / 16 / CONFIG_BAUDRATE);
  56#ifdef CONFIG_SPL_MMC_BOOT
  57        puts("\nSD boot...\n");
  58#elif defined(CONFIG_SPL_SPI_BOOT)
  59        puts("\nSPI Flash boot...\n");
  60#endif
  61
  62        /* copy code to RAM and jump to it - this should not return */
  63        /* NOTE - code has to be copied out of NAND buffer before
  64         * other blocks can be read.
  65         */
  66        relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
  67}
  68
  69void board_init_r(gd_t *gd, ulong dest_addr)
  70{
  71        /* Pointer is writable since we allocated a register for it */
  72        gd = (gd_t *)CONFIG_SPL_GD_ADDR;
  73        bd_t *bd;
  74
  75        memset(gd, 0, sizeof(gd_t));
  76        bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
  77        memset(bd, 0, sizeof(bd_t));
  78        gd->bd = bd;
  79        bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
  80        bd->bi_memsize = CONFIG_SYS_L2_SIZE;
  81
  82        probecpu();
  83        get_clocks();
  84        mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
  85                        CONFIG_SPL_RELOC_MALLOC_SIZE);
  86
  87#ifndef CONFIG_SPL_NAND_BOOT
  88        env_init();
  89#endif
  90#ifdef CONFIG_SPL_MMC_BOOT
  91        mmc_initialize(bd);
  92#endif
  93        /* relocate environment function pointers etc. */
  94#ifdef CONFIG_SPL_NAND_BOOT
  95        nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
  96                            (uchar *)CONFIG_ENV_ADDR);
  97        gd->env_addr  = (ulong)(CONFIG_ENV_ADDR);
  98        gd->env_valid = 1;
  99#else
 100        env_relocate();
 101#endif
 102
 103#ifdef CONFIG_SYS_I2C
 104        i2c_init_all();
 105#else
 106        i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 107#endif
 108
 109        gd->ram_size = initdram(0);
 110#ifdef CONFIG_SPL_NAND_BOOT
 111        puts("Tertiary program loader running in sram...");
 112#else
 113        puts("Second program loader running in sram...\n");
 114#endif
 115
 116#ifdef CONFIG_SPL_MMC_BOOT
 117        mmc_boot();
 118#elif defined(CONFIG_SPL_SPI_BOOT)
 119        spi_boot();
 120#elif defined(CONFIG_SPL_NAND_BOOT)
 121        nand_boot();
 122#endif
 123}
 124