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7#include <linux/io.h>
8#include <linux/serial_reg.h>
9#include <linux/sizes.h>
10#include <asm/errno.h>
11#include <dm/device.h>
12#include <mapmem.h>
13#include <serial.h>
14#include <fdtdec.h>
15
16
17
18
19struct uniphier_serial {
20 u32 rx;
21#define tx rx
22 u32 ier;
23 u32 iir;
24 u32 char_fcr;
25 u32 lcr_mcr;
26#define LCR_SHIFT 8
27#define LCR_MASK (0xff << (LCR_SHIFT))
28 u32 lsr;
29 u32 msr;
30 u32 __rsv0;
31 u32 __rsv1;
32 u32 dlr;
33};
34
35struct uniphier_serial_private_data {
36 struct uniphier_serial __iomem *membase;
37 unsigned int uartclk;
38};
39
40#define uniphier_serial_port(dev) \
41 ((struct uniphier_serial_private_data *)dev_get_priv(dev))->membase
42
43static int uniphier_serial_setbrg(struct udevice *dev, int baudrate)
44{
45 struct uniphier_serial_private_data *priv = dev_get_priv(dev);
46 struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
47 const unsigned int mode_x_div = 16;
48 unsigned int divisor;
49
50 divisor = DIV_ROUND_CLOSEST(priv->uartclk, mode_x_div * baudrate);
51
52 writel(divisor, &port->dlr);
53
54 return 0;
55}
56
57static int uniphier_serial_getc(struct udevice *dev)
58{
59 struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
60
61 if (!(readl(&port->lsr) & UART_LSR_DR))
62 return -EAGAIN;
63
64 return readl(&port->rx);
65}
66
67static int uniphier_serial_putc(struct udevice *dev, const char c)
68{
69 struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
70
71 if (!(readl(&port->lsr) & UART_LSR_THRE))
72 return -EAGAIN;
73
74 writel(c, &port->tx);
75
76 return 0;
77}
78
79static int uniphier_serial_pending(struct udevice *dev, bool input)
80{
81 struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
82
83 if (input)
84 return readl(&port->lsr) & UART_LSR_DR;
85 else
86 return !(readl(&port->lsr) & UART_LSR_THRE);
87}
88
89static int uniphier_serial_probe(struct udevice *dev)
90{
91 DECLARE_GLOBAL_DATA_PTR;
92 struct uniphier_serial_private_data *priv = dev_get_priv(dev);
93 struct uniphier_serial __iomem *port;
94 fdt_addr_t base;
95 u32 tmp;
96
97 base = dev_get_addr(dev);
98 if (base == FDT_ADDR_T_NONE)
99 return -EINVAL;
100
101 port = map_sysmem(base, SZ_64);
102 if (!port)
103 return -ENOMEM;
104
105 priv->membase = port;
106
107 priv->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
108 "clock-frequency", 0);
109
110 tmp = readl(&port->lcr_mcr);
111 tmp &= ~LCR_MASK;
112 tmp |= UART_LCR_WLEN8 << LCR_SHIFT;
113 writel(tmp, &port->lcr_mcr);
114
115 return 0;
116}
117
118static int uniphier_serial_remove(struct udevice *dev)
119{
120 unmap_sysmem(uniphier_serial_port(dev));
121
122 return 0;
123}
124
125static const struct udevice_id uniphier_uart_of_match[] = {
126 { .compatible = "socionext,uniphier-uart" },
127 { }
128};
129
130static const struct dm_serial_ops uniphier_serial_ops = {
131 .setbrg = uniphier_serial_setbrg,
132 .getc = uniphier_serial_getc,
133 .putc = uniphier_serial_putc,
134 .pending = uniphier_serial_pending,
135};
136
137U_BOOT_DRIVER(uniphier_serial) = {
138 .name = "uniphier-uart",
139 .id = UCLASS_SERIAL,
140 .of_match = uniphier_uart_of_match,
141 .probe = uniphier_serial_probe,
142 .remove = uniphier_serial_remove,
143 .priv_auto_alloc_size = sizeof(struct uniphier_serial_private_data),
144 .ops = &uniphier_serial_ops,
145};
146