1/* 2 * (C) Copyright 2002, 2003 3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 4 * Marius Groeger <mgroeger@sysgo.de> 5 * Gary Jennejohn <garyj@denx.de> 6 * David Mueller <d.mueller@elsoft.ch> 7 * 8 * Configuation settings for the MPL VCMA9 board. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13#ifndef __CONFIG_H 14#define __CONFIG_H 15 16#define MACH_TYPE_MPL_VCMA9 227 17 18/* 19 * High Level Configuration Options 20 * (easy to change) 21 */ 22#define CONFIG_SYS_THUMB_BUILD 23 24#define CONFIG_S3C24X0 /* This is a SAMSUNG S3C24x0-type SoC */ 25#define CONFIG_S3C2410 /* specifically a SAMSUNG S3C2410 SoC */ 26#define CONFIG_VCMA9 /* on a MPL VCMA9 Board */ 27#define CONFIG_MACH_TYPE MACH_TYPE_MPL_VCMA9 /* Machine type */ 28 29#define CONFIG_SYS_TEXT_BASE 0x0 30 31#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH 32 33/* input clock of PLL (VCMA9 has 12MHz input clock) */ 34#define CONFIG_SYS_CLK_FREQ 12000000 35 36#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 37#define CONFIG_SETUP_MEMORY_TAGS 38#define CONFIG_INITRD_TAG 39 40/* 41 * BOOTP options 42 */ 43#define CONFIG_BOOTP_BOOTFILESIZE 44#define CONFIG_BOOTP_BOOTPATH 45#define CONFIG_BOOTP_GATEWAY 46#define CONFIG_BOOTP_HOSTNAME 47 48/* 49 * Command line configuration. 50 */ 51#define CONFIG_CMD_EEPROM 52#define CONFIG_CMD_REGINFO 53#define CONFIG_CMD_DATE 54#define CONFIG_CMD_BSP 55#define CONFIG_CMD_NAND 56 57#define CONFIG_BOARD_LATE_INIT 58 59#define CONFIG_CMDLINE_EDITING 60 61/* 62 * I2C stuff: 63 * the MPL VCMA9 is equipped with an ATMEL 24C256 EEPROM at 64 * address 0x50 with 16bit addressing 65 */ 66#define CONFIG_SYS_I2C 67 68/* we use the built-in I2C controller */ 69#define CONFIG_SYS_I2C_S3C24X0 70#define CONFIG_SYS_I2C_S3C24X0_SPEED 100000 /* I2C speed */ 71#define CONFIG_SYS_I2C_S3C24X0_SLAVE 0x7F /* I2C slave addr */ 72 73#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 74#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 75/* use EEPROM for environment vars */ 76#define CONFIG_ENV_IS_IN_EEPROM 1 77/* environment starts at offset 0 */ 78#define CONFIG_ENV_OFFSET 0x000 79/* 2KB should be more than enough */ 80#define CONFIG_ENV_SIZE 0x800 81 82#undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 83/* 64 bytes page write mode on 24C256 */ 84#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 85#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 86 87/* 88 * Hardware drivers 89 */ 90#define CONFIG_CS8900 /* we have a CS8900 on-board */ 91#define CONFIG_CS8900_BASE 0x20000300 92#define CONFIG_CS8900_BUS16 93 94/* 95 * select serial console configuration 96 */ 97#define CONFIG_S3C24X0_SERIAL 98#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on VCMA9 */ 99 100/* USB support (currently only works with D-cache off) */ 101#define CONFIG_USB_OHCI 102#define CONFIG_USB_OHCI_S3C24XX 103#define CONFIG_USB_KEYBOARD 104#define CONFIG_USB_STORAGE 105#define CONFIG_DOS_PARTITION 106 107/* Enable needed helper functions */ 108#define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */ 109 110/* RTC */ 111#define CONFIG_RTC_S3C24X0 112 113/* allow to overwrite serial and ethaddr */ 114#define CONFIG_ENV_OVERWRITE 115 116#define CONFIG_BAUDRATE 9600 117 118#define CONFIG_BOOTDELAY 5 119#define CONFIG_BOOT_RETRY_TIME -1 120#define CONFIG_RESET_TO_RETRY 121#define CONFIG_ZERO_BOOTDELAY_CHECK 122 123#define CONFIG_NETMASK 255.255.255.0 124#define CONFIG_IPADDR 10.0.0.110 125#define CONFIG_SERVERIP 10.0.0.1 126 127#if defined(CONFIG_CMD_KGDB) 128/* speed to run kgdb serial port */ 129#define CONFIG_KGDB_BAUDRATE 115200 130#endif 131 132/* Miscellaneous configurable options */ 133#define CONFIG_SYS_LONGHELP /* undef to save memory */ 134#define CONFIG_SYS_CBSIZE 256 135/* Print Buffer Size */ 136#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 137#define CONFIG_SYS_MAXARGS 16 138/* Boot Argument Buffer Size */ 139#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 140 141#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ 142#define CONFIG_DISPLAY_BOARDINFO /* Display board info */ 143 144#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */ 145#define CONFIG_SYS_MEMTEST_END 0x31FFFFFF /* 32 MB in DRAM */ 146 147#define CONFIG_SYS_ALT_MEMTEST 148#define CONFIG_SYS_LOAD_ADDR 0x30800000 149 150/* we configure PWM Timer 4 to 1ms 1000Hz */ 151 152/* support additional compression methods */ 153#define CONFIG_BZIP2 154#define CONFIG_LZO 155#define CONFIG_LZMA 156 157/* Ident */ 158/*#define VERSION_TAG "released"*/ 159#define VERSION_TAG "unstable" 160#define CONFIG_IDENT_STRING "\n(c) 2003 - 2011 by MPL AG Switzerland, " \ 161 "MEV-10080-001 " VERSION_TAG 162 163/* Physical Memory Map */ 164#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ 165#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */ 166#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ 167 168#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 169 170/* FLASH and environment organization */ 171 172#define CONFIG_SYS_FLASH_CFI 173#define CONFIG_FLASH_CFI_DRIVER 174#define CONFIG_FLASH_CFI_LEGACY 175#define CONFIG_SYS_FLASH_LEGACY_512Kx16 176#define CONFIG_FLASH_SHOW_PROGRESS 45 177#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 178#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 179#define CONFIG_SYS_MAX_FLASH_SECT (19) 180 181/* 182 * Size of malloc() pool 183 * BZIP2 / LZO / LZMA need a lot of RAM 184 */ 185#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 186#define CONFIG_SYS_MONITOR_LEN (512 * 1024) 187#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 188 189/* NAND configuration */ 190#ifdef CONFIG_CMD_NAND 191#define CONFIG_NAND_S3C2410 192#define CONFIG_SYS_S3C2410_NAND_HWECC 193#define CONFIG_SYS_MAX_NAND_DEVICE 1 194#define CONFIG_SYS_NAND_BASE 0x4E000000 195#define CONFIG_S3C24XX_CUSTOM_NAND_TIMING 196#define CONFIG_S3C24XX_TACLS 1 197#define CONFIG_S3C24XX_TWRPH0 5 198#define CONFIG_S3C24XX_TWRPH1 3 199#endif 200 201#define MULTI_PURPOSE_SOCKET_ADDR 0x08000000 202 203/* File system */ 204#define CONFIG_CMD_UBI 205#define CONFIG_CMD_UBIFS 206#define CONFIG_CMD_JFFS2 207#define CONFIG_YAFFS2 208#define CONFIG_RBTREE 209#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 210#define CONFIG_MTD_PARTITIONS 211#define CONFIG_CMD_MTDPARTS 212#define CONFIG_LZO 213 214#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 215#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ 216 GENERATED_GBL_DATA_SIZE) 217 218#define CONFIG_BOARD_EARLY_INIT_F 219 220#endif /* __CONFIG_H */ 221