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13#ifndef __ARISTAINETOS_COMMON_CONFIG_H
14#define __ARISTAINETOS_COMMON_CONFIG_H
15
16#include "mx6_common.h"
17
18#define CONFIG_MACH_TYPE 4501
19#define CONFIG_MMCROOT "/dev/mmcblk0p1"
20#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
21
22
23#define CONFIG_SYS_MALLOC_LEN (64 * SZ_1M)
24
25#define CONFIG_BOARD_EARLY_INIT_F
26
27#define CONFIG_MXC_UART
28
29
30#define CONFIG_SYS_FSL_ESDHC_ADDR 0
31
32#define CONFIG_FEC_MXC
33#define CONFIG_MII
34#define IMX_FEC_BASE ENET_BASE_ADDR
35#define CONFIG_ETHPRIME "FEC"
36#define CONFIG_FEC_MXC_PHYADDR 0
37
38#define CONFIG_PHYLIB
39#define CONFIG_PHY_MICREL
40
41#define CONFIG_SPI_FLASH_MTD
42#define CONFIG_MXC_SPI
43#define CONFIG_SF_DEFAULT_SPEED 20000000
44#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
45#define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
46
47
48#define CONFIG_CMD_BMODE
49
50#define CONFIG_EXTRA_ENV_SETTINGS \
51 "script=u-boot.scr\0" \
52 "fit_file=/boot/system.itb\0" \
53 "loadaddr=0x12000000\0" \
54 "fit_addr_r=0x14000000\0" \
55 "uboot=/boot/u-boot.imx\0" \
56 "uboot_sz=d0000\0" \
57 "rescue_sys_addr=f0000\0" \
58 "rescue_sys_length=f10000\0" \
59 "panel=lb07wv8\0" \
60 "splashpos=m,m\0" \
61 "console=" CONFIG_CONSOLE_DEV "\0" \
62 "fdt_high=0xffffffff\0" \
63 "initrd_high=0xffffffff\0" \
64 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
65 "set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \
66 "default ${board_type}\0" \
67 "get_env=mw ${loadaddr} 0 0x20000;" \
68 "mmc rescan;" \
69 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \
70 "env import -t ${loadaddr}\0" \
71 "default_env=mw ${loadaddr} 0 0x20000;" \
72 "env export -t ${loadaddr} serial# ethaddr eth1addr " \
73 "board_type panel;" \
74 "env default -a;" \
75 "env import -t ${loadaddr}\0" \
76 "loadbootscript=" \
77 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
78 "bootscript=echo Running bootscript from mmc ...; " \
79 "source\0" \
80 "mmcpart=1\0" \
81 "mmcdev=0\0" \
82 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
83 "mmcargs=setenv bootargs console=${console},${baudrate} " \
84 "root=${mmcroot}\0" \
85 "mmcboot=echo Booting from mmc ...; " \
86 "run mmcargs addmtd addmisc set_fit_default;" \
87 "bootm ${fit_addr_r}\0" \
88 "mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
89 "${fit_file}\0" \
90 "mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
91 "${uboot}\0" \
92 "mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
93 "setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \
94 "setexpr uboot_maxsize ${uboot_sz} - 400;" \
95 "mw.b ${cmp_buf} 0x00 ${uboot_sz};" \
96 "run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \
97 "sf write ${loadaddr} 400 ${filesize};" \
98 "sf read ${cmp_buf} 400 ${uboot_sz};" \
99 "cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \
100 "ubiboot=echo Booting from ubi ...; " \
101 "run ubiargs addmtd addmisc set_fit_default;" \
102 "bootm ${fit_addr_r}\0" \
103 "rescueargs=setenv bootargs console=${console},${baudrate} " \
104 "root=/dev/ram rw\0 " \
105 "rescueboot=echo Booting rescue system from NOR ...; " \
106 "run rescueargs addmtd addmisc set_fit_default;" \
107 "bootm ${fit_addr_r}\0" \
108 "rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \
109 "${rescue_sys_length}; imi ${fit_addr_r}\0" \
110 CONFIG_EXTRA_ENV_BOARD_SETTINGS
111
112#define CONFIG_BOOTCOMMAND \
113 "mmc dev ${mmcdev};" \
114 "if mmc rescan; then " \
115 "if run loadbootscript; then " \
116 "run bootscript; " \
117 "else " \
118 "if run mmc_load_fit; then " \
119 "run mmcboot; " \
120 "else " \
121 "if run ubifs_load_fit; then " \
122 "run ubiboot; " \
123 "else " \
124 "if run rescue_load_fit; then " \
125 "run rescueboot; " \
126 "else " \
127 "echo RESCUE SYSTEM BOOT " \
128 "FAILURE;" \
129 "fi; " \
130 "fi; " \
131 "fi; " \
132 "fi; " \
133 "else " \
134 "if run ubifs_load_fit; then " \
135 "run ubiboot; " \
136 "else " \
137 "if run rescue_load_fit; then " \
138 "run rescueboot; " \
139 "else " \
140 "echo RESCUE SYSTEM BOOT FAILURE;" \
141 "fi; " \
142 "fi; " \
143 "fi"
144
145#define CONFIG_ARP_TIMEOUT 200UL
146
147
148#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
149
150#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
151#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
152#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
153
154#define CONFIG_STACKSIZE (128 * 1024)
155
156
157#define CONFIG_NR_DRAM_BANKS 1
158#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
159
160#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
161#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
162#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
163
164#define CONFIG_SYS_INIT_SP_OFFSET \
165 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
166#define CONFIG_SYS_INIT_SP_ADDR \
167 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
168
169
170#define CONFIG_ENV_SIZE (12 * 1024)
171#define CONFIG_ENV_IS_IN_SPI_FLASH
172#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
173#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
174#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
175#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
176#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
177#define CONFIG_ENV_SECT_SIZE (0x010000)
178#define CONFIG_ENV_OFFSET (0x0d0000)
179#define CONFIG_ENV_OFFSET_REDUND (0x0e0000)
180
181#define CONFIG_SYS_FSL_USDHC_NUM 2
182
183
184#define CONFIG_SYS_I2C
185#define CONFIG_SYS_I2C_MXC
186#define CONFIG_SYS_I2C_MXC_I2C1
187#define CONFIG_SYS_I2C_MXC_I2C2
188#define CONFIG_SYS_I2C_MXC_I2C3
189#define CONFIG_SYS_I2C_SPEED 100000
190#define CONFIG_SYS_I2C_SLAVE 0x7f
191#define CONFIG_SYS_I2C_NOPROBES { {0, 0x00} }
192
193
194#define CONFIG_CMD_NAND
195#define CONFIG_CMD_NAND_TRIMFFS
196#define CONFIG_NAND_MXS
197#define CONFIG_SYS_MAX_NAND_DEVICE 1
198#define CONFIG_SYS_NAND_BASE 0x40000000
199#define CONFIG_SYS_NAND_5_ADDR_CYCLE
200#define CONFIG_SYS_NAND_ONFI_DETECTION
201
202
203#define CONFIG_APBH_DMA
204#define CONFIG_APBH_DMA_BURST
205#define CONFIG_APBH_DMA_BURST8
206
207
208#define CONFIG_SYS_I2C_RTC_ADDR 0x68
209#define CONFIG_SYS_RTC_BUS_NUM 2
210#define CONFIG_RTC_M41T11
211#define CONFIG_CMD_DATE
212
213
214#define CONFIG_USB_EHCI
215#define CONFIG_USB_EHCI_MX6
216#define CONFIG_USB_STORAGE
217#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
218#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
219#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
220#define CONFIG_MXC_USB_FLAGS 0
221
222
223#define CONFIG_LZO
224#define CONFIG_CMD_MTDPARTS
225#define CONFIG_MTD_PARTITIONS
226#define CONFIG_MTD_DEVICE
227#define CONFIG_RBTREE
228#define CONFIG_CMD_UBI
229#define CONFIG_CMD_UBIFS
230
231#define CONFIG_MTD_UBI_FASTMAP
232#define CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT 1
233
234#define CONFIG_HW_WATCHDOG
235#define CONFIG_IMX_WATCHDOG
236
237
238#define CONFIG_VIDEO
239#define CONFIG_VIDEO_IPUV3
240
241#define CONFIG_CFB_CONSOLE
242#define CONFIG_VGA_AS_SINGLE_DEVICE
243#define CONFIG_SYS_CONSOLE_IS_IN_ENV
244#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
245#define CONFIG_VIDEO_BMP_RLE8
246#define CONFIG_SPLASH_SCREEN
247#define CONFIG_SPLASH_SCREEN_ALIGN
248#define CONFIG_BMP_16BPP
249#define CONFIG_VIDEO_LOGO
250#define CONFIG_VIDEO_BMP_LOGO
251#define CONFIG_IPUV3_CLK 198000000
252#define CONFIG_IMX_VIDEO_SKIP
253
254#define CONFIG_CMD_BMP
255
256#define CONFIG_PWM_IMX
257#define CONFIG_IMX6_PWM_PER_CLK 66000000
258
259#endif
260
