LXR uboot/include/configs/snapper9260.h

   1/*
   2 * Bluewater Systems Snapper 9260 and 9G20 modules
   3 *
   4 * (C) Copyright 2011 Bluewater Systems
   5 *   Author: Andre Renaud <andre@bluewatersys.com>
   6 *   Author: Ryan Mallon <ryan@bluewatersys.com>
   7 *
   8 * SPDX-License-Identifier:     GPL-2.0+
   9 */
  10
  11#ifndef __CONFIG_H
  12#define __CONFIG_H
  13
  14/* SoC type is defined in boards.cfg */
  15#include <asm/hardware.h>
  16#include <linux/sizes.h>
  17
  18#define CONFIG_SYS_TEXT_BASE            0x21f00000
  19
  20/* ARM asynchronous clock */
  21#define CONFIG_SYS_AT91_MAIN_CLOCK      18432000 /* External Crystal, in Hz */
  22#define CONFIG_SYS_AT91_SLOW_CLOCK      32768
  23
  24/* CPU */
  25#define CONFIG_ARCH_CPU_INIT
  26
  27#define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs      */
  28#define CONFIG_SETUP_MEMORY_TAGS
  29#define CONFIG_INITRD_TAG
  30#define CONFIG_SKIP_LOWLEVEL_INIT
  31#define CONFIG_DISPLAY_CPUINFO
  32
  33/* SDRAM */
  34#define CONFIG_NR_DRAM_BANKS            1
  35#define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_CS1
  36#define CONFIG_SYS_SDRAM_SIZE           (64 * 1024 * 1024) /* 64MB */
  37#define CONFIG_SYS_INIT_SP_ADDR         (ATMEL_BASE_SRAM1 + 0x1000 - \
  38                                         GENERATED_GBL_DATA_SIZE)
  39
  40/* Mem test settings */
  41#define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
  42#define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
  43
  44/* NAND Flash */
  45#define CONFIG_NAND_ATMEL
  46#define CONFIG_SYS_NO_FLASH
  47#define CONFIG_SYS_MAX_NAND_DEVICE      1
  48#define CONFIG_SYS_NAND_BASE            ATMEL_BASE_CS3
  49#define CONFIG_SYS_NAND_DBW_8
  50#define CONFIG_SYS_NAND_MASK_ALE        (1 << 21) /* AD21 */
  51#define CONFIG_SYS_NAND_MASK_CLE        (1 << 22) /* AD22 */
  52#define CONFIG_SYS_NAND_ENABLE_PIN      AT91_PIN_PC14
  53#define CONFIG_SYS_NAND_READY_PIN       AT91_PIN_PC13
  54
  55/* Ethernet */
  56#define CONFIG_MACB
  57#define CONFIG_RMII
  58#define CONFIG_NET_RETRY_COUNT          20
  59#define CONFIG_RESET_PHY_R
  60#define CONFIG_AT91_WANTS_COMMON_PHY
  61#define CONFIG_TFTP_PORT
  62#define CONFIG_TFTP_TSIZE
  63
  64/* USB */
  65#define CONFIG_USB_ATMEL
  66#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
  67#define CONFIG_USB_OHCI_NEW
  68#define CONFIG_DOS_PARTITION
  69#define CONFIG_SYS_USB_OHCI_CPU_INIT
  70#define CONFIG_SYS_USB_OHCI_REGS_BASE   ATMEL_UHP_BASE
  71#define CONFIG_SYS_USB_OHCI_SLOT_NAME   "at91sam9260"
  72#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      2
  73#define CONFIG_USB_STORAGE
  74
  75/* GPIOs and IO expander */
  76#define CONFIG_ATMEL_LEGACY
  77#define CONFIG_AT91_GPIO
  78#define CONFIG_AT91_GPIO_PULLUP         1
  79#define CONFIG_PCA953X
  80#define CONFIG_SYS_I2C_PCA953X_ADDR     0x28
  81#define CONFIG_SYS_I2C_PCA953X_WIDTH    { {0x28, 16} }
  82
  83/* UARTs/Serial console */
  84#define CONFIG_ATMEL_USART
  85#ifndef CONFIG_DM_SERIAL
  86#define CONFIG_USART_BASE               ATMEL_BASE_DBGU
  87#define CONFIG_USART_ID                 ATMEL_ID_SYS
  88#endif
  89#define CONFIG_BAUDRATE                 115200
  90
  91/* I2C - Bit-bashed */
  92#define CONFIG_SYS_I2C
  93#define CONFIG_SYS_I2C_SOFT             /* I2C bit-banged */
  94#define CONFIG_SYS_I2C_SOFT_SPEED       100000
  95#define CONFIG_SYS_I2C_SOFT_SLAVE       0x7F
  96#define CONFIG_SOFT_I2C_READ_REPEATED_START
  97#define I2C_INIT do {                                                   \
  98                at91_set_gpio_output(AT91_PIN_PA23, 1);                 \
  99                at91_set_gpio_output(AT91_PIN_PA24, 1);                 \
 100                at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1);        \
 101                at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1);        \
 102        } while (0)
 103#define I2C_SOFT_DECLARATIONS
 104#define I2C_ACTIVE
 105#define I2C_TRISTATE    at91_set_gpio_input(AT91_PIN_PA23, 1);
 106#define I2C_READ        at91_get_gpio_value(AT91_PIN_PA23);
 107#define I2C_SDA(bit) do {                                               \
 108                if (bit) {                                              \
 109                        at91_set_gpio_input(AT91_PIN_PA23, 1);          \
 110                } else {                                                \
 111                        at91_set_gpio_output(AT91_PIN_PA23, 1);         \
 112                        at91_set_gpio_value(AT91_PIN_PA23, bit);        \
 113                }                                                       \
 114        } while (0)
 115#define I2C_SCL(bit)    at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
 116#define I2C_DELAY       udelay(2)
 117
 118/* Boot options */
 119#define CONFIG_SYS_LOAD_ADDR            0x23000000
 120#define CONFIG_BOOTDELAY                3
 121#define CONFIG_ZERO_BOOTDELAY_CHECK
 122
 123#define CONFIG_BOOTP_BOOTFILESIZE
 124#define CONFIG_BOOTP_BOOTPATH
 125#define CONFIG_BOOTP_GATEWAY
 126#define CONFIG_BOOTP_HOSTNAME
 127
 128/* Environment settings */
 129#define CONFIG_ENV_IS_IN_NAND
 130#define CONFIG_ENV_OFFSET               (512 << 10)
 131#define CONFIG_ENV_SIZE                 (256 << 10)
 132#define CONFIG_ENV_OVERWRITE
 133#define CONFIG_BOOTARGS                 "console=ttyS0,115200 ip=any"
 134
 135/* Console settings */
 136#define CONFIG_SYS_CBSIZE               256
 137#define CONFIG_SYS_MAXARGS              16
 138#define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE +            \
 139                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 140#define CONFIG_SYS_LONGHELP
 141#define CONFIG_CMDLINE_EDITING
 142#define CONFIG_AUTO_COMPLETE
 143
 144/* U-Boot memory settings */
 145#define CONFIG_SYS_MALLOC_LEN           (1 << 20)
 146
 147/* Command line configuration */
 148#define CONFIG_CMD_NAND
 149#define CONFIG_CMD_PCA953X
 150#define CONFIG_CMD_PCA953X_INFO
 151
 152#endif /* __CONFIG_H */
 153