LXR uboot/arch/m68k/cpu/mcf547x

   1/*
   2 *
   3 * (C) Copyright 2000-2003
   4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   5 *
   6 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
   7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
   8 *
   9 * SPDX-License-Identifier:     GPL-2.0+
  10 */
  11
  12#include <common.h>
  13#include <watchdog.h>
  14#include <command.h>
  15#include <netdev.h>
  16
  17#include <asm/immap.h>
  18#include <asm/io.h>
  19
  20DECLARE_GLOBAL_DATA_PTR;
  21
  22int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  23{
  24        gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
  25
  26        out_be16(&gptmr->pre, 10);
  27        out_be16(&gptmr->cnt, 1);
  28
  29        /* enable watchdog, set timeout to 0 and wait */
  30        out_8(&gptmr->mode, GPT_TMS_SGPIO);
  31        out_8(&gptmr->ctrl, GPT_CTRL_WDEN | GPT_CTRL_CE);
  32
  33        /* we don't return! */
  34        return 1;
  35};
  36
  37int checkcpu(void)
  38{
  39        siu_t *siu = (siu_t *) MMAP_SIU;
  40        u16 id = 0;
  41
  42        puts("CPU:   ");
  43
  44        switch ((in_be32(&siu->jtagid) & 0x000FF000) >> 12) {
  45        case 0x0C:
  46                id = 5485;
  47                break;
  48        case 0x0D:
  49                id = 5484;
  50                break;
  51        case 0x0E:
  52                id = 5483;
  53                break;
  54        case 0x0F:
  55                id = 5482;
  56                break;
  57        case 0x10:
  58                id = 5481;
  59                break;
  60        case 0x11:
  61                id = 5480;
  62                break;
  63        case 0x12:
  64                id = 5475;
  65                break;
  66        case 0x13:
  67                id = 5474;
  68                break;
  69        case 0x14:
  70                id = 5473;
  71                break;
  72        case 0x15:
  73                id = 5472;
  74                break;
  75        case 0x16:
  76                id = 5471;
  77                break;
  78        case 0x17:
  79                id = 5470;
  80                break;
  81        }
  82
  83        if (id) {
  84                char buf1[32], buf2[32];
  85
  86                printf("Freescale MCF%d\n", id);
  87                printf("       CPU CLK %s MHz BUS CLK %s MHz\n",
  88                       strmhz(buf1, gd->cpu_clk),
  89                       strmhz(buf2, gd->bus_clk));
  90        }
  91
  92        return 0;
  93};
  94
  95#if defined(CONFIG_HW_WATCHDOG)
  96/* Called by macro WATCHDOG_RESET */
  97void hw_watchdog_reset(void)
  98{
  99        gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
 100
 101        out_8(&gptmr->ocpw, 0xa5);
 102}
 103
 104int watchdog_disable(void)
 105{
 106        gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
 107
 108        /* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
 109        out_8(&gptmr->mode, 0);
 110        out_8(&gptmr->ctrl, 0);
 111
 112        puts("WATCHDOG:disabled\n");
 113
 114        return (0);
 115}
 116
 117int watchdog_init(void)
 118{
 119        gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
 120
 121        out_be16(&gptmr->pre, CONFIG_WATCHDOG_TIMEOUT);
 122        out_be16(&gptmr->cnt, CONFIG_SYS_TIMER_PRESCALER * 1000);
 123
 124        out_8(&gptmr->mode, GPT_TMS_SGPIO);
 125        out_8(&gptmr->ctrl, GPT_CTRL_CE | GPT_CTRL_WDEN);
 126        puts("WATCHDOG:enabled\n");
 127
 128        return (0);
 129}
 130#endif                          /* CONFIG_HW_WATCHDOG */
 131
 132#if defined(CONFIG_FSLDMAFEC) || defined(CONFIG_MCFFEC)
 133/* Default initializations for MCFFEC controllers.  To override,
 134 * create a board-specific function called:
 135 *      int board_eth_init(bd_t *bis)
 136 */
 137
 138int cpu_eth_init(bd_t *bis)
 139{
 140#if defined(CONFIG_FSLDMAFEC)
 141        mcdmafec_initialize(bis);
 142#endif
 143#if defined(CONFIG_MCFFEC)
 144        mcffec_initialize(bis);
 145#endif
 146        return 0;
 147}
 148#endif
 149