1/* 2 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. 3 * Hayden Fraser (Hayden.Fraser@freescale.com) 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8#ifndef _M5253EVBE_H 9#define _M5253EVBE_H 10 11#define CONFIG_M5253EVBE /* define board type */ 12 13#define CONFIG_MCFTMR 14 15#define CONFIG_MCFUART 16#define CONFIG_SYS_UART_PORT (0) 17#define CONFIG_BAUDRATE 115200 18 19#undef CONFIG_WATCHDOG /* disable watchdog */ 20 21 22/* Configuration for environment 23 * Environment is embedded in u-boot in the second sector of the flash 24 */ 25#ifndef CONFIG_MONITOR_IS_IN_RAM 26#define CONFIG_ENV_OFFSET 0x4000 27#define CONFIG_ENV_SECT_SIZE 0x2000 28#define CONFIG_ENV_IS_IN_FLASH 1 29#else 30#define CONFIG_ENV_ADDR 0xffe04000 31#define CONFIG_ENV_SECT_SIZE 0x2000 32#define CONFIG_ENV_IS_IN_FLASH 1 33#endif 34 35#define LDS_BOARD_TEXT \ 36 . = DEFINED(env_offset) ? env_offset : .; \ 37 common/env_embedded.o (.text) 38 39/* 40 * BOOTP options 41 */ 42#undef CONFIG_BOOTP_BOOTFILESIZE 43#undef CONFIG_BOOTP_BOOTPATH 44#undef CONFIG_BOOTP_GATEWAY 45#undef CONFIG_BOOTP_HOSTNAME 46 47/* 48 * Command line configuration. 49 */ 50#define CONFIG_CMD_IDE 51 52/* ATA */ 53#define CONFIG_DOS_PARTITION 54#define CONFIG_MAC_PARTITION 55#define CONFIG_IDE_RESET 1 56#define CONFIG_IDE_PREINIT 1 57#define CONFIG_ATAPI 58#undef CONFIG_LBA48 59 60#define CONFIG_SYS_IDE_MAXBUS 1 61#define CONFIG_SYS_IDE_MAXDEVICE 2 62 63#define CONFIG_SYS_ATA_BASE_ADDR (CONFIG_SYS_MBAR2 + 0x800) 64#define CONFIG_SYS_ATA_IDE0_OFFSET 0 65 66#define CONFIG_SYS_ATA_DATA_OFFSET 0xA0 /* Offset for data I/O */ 67#define CONFIG_SYS_ATA_REG_OFFSET 0xA0 /* Offset for normal register accesses */ 68#define CONFIG_SYS_ATA_ALT_OFFSET 0xC0 /* Offset for alternate registers */ 69#define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */ 70 71#define CONFIG_SYS_LONGHELP /* undef to save memory */ 72 73#if defined(CONFIG_CMD_KGDB) 74#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 75#else 76#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 77#endif 78#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 79#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 80#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 81 82#define CONFIG_SYS_LOAD_ADDR 0x00100000 83 84#define CONFIG_SYS_MEMTEST_START 0x400 85#define CONFIG_SYS_MEMTEST_END 0x380000 86 87#undef CONFIG_SYS_PLL_BYPASS /* bypass PLL for test purpose */ 88#define CONFIG_SYS_FAST_CLK 89#ifdef CONFIG_SYS_FAST_CLK 90# define CONFIG_SYS_PLLCR 0x1243E054 91# define CONFIG_SYS_CLK 140000000 92#else 93# define CONFIG_SYS_PLLCR 0x135a4140 94# define CONFIG_SYS_CLK 70000000 95#endif 96 97/* 98 * Low Level Configuration Settings 99 * (address mappings, register initial values, etc.) 100 * You should know what you are doing if you make changes here. 101 */ 102 103#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */ 104#define CONFIG_SYS_MBAR2 0x80000000 /* Module Base Addrs 2 */ 105 106/* 107 * Definitions for initial stack pointer and data area (in DPRAM) 108 */ 109#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 110#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ 111#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 112#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 113 114/* 115 * Start addresses for the final memory configuration 116 * (Set up by the startup code) 117 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 118 */ 119#define CONFIG_SYS_SDRAM_BASE 0x00000000 120#define CONFIG_SYS_SDRAM_SIZE 8 /* SDRAM size in MB */ 121 122#ifdef CONFIG_MONITOR_IS_IN_RAM 123#define CONFIG_SYS_MONITOR_BASE 0x20000 124#else 125#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 126#endif 127 128#define CONFIG_SYS_MONITOR_LEN 0x40000 129#define CONFIG_SYS_MALLOC_LEN (256 << 10) 130#define CONFIG_SYS_BOOTPARAMS_LEN (64*1024) 131 132/* 133 * For booting Linux, the board info and command line data 134 * have to be in the first 8 MB of memory, since this is 135 * the maximum mapped by the Linux kernel during initialization ?? 136 */ 137#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) 138#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20) 139 140/* FLASH organization */ 141#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE 142#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 143#define CONFIG_SYS_MAX_FLASH_SECT 35 /* max number of sectors on one chip */ 144#define CONFIG_SYS_FLASH_ERASE_TOUT 1000 145 146#define CONFIG_SYS_FLASH_CFI 1 147#define CONFIG_FLASH_CFI_DRIVER 1 148#define CONFIG_SYS_FLASH_SIZE 0x200000 149#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 150 151/* Cache Configuration */ 152#define CONFIG_SYS_CACHELINE_SIZE 16 153 154#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 155 CONFIG_SYS_INIT_RAM_SIZE - 8) 156#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 157 CONFIG_SYS_INIT_RAM_SIZE - 4) 158#define CONFIG_SYS_ICACHE_INV (CF_CACR_DCM) 159#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_FLASH_BASE | \ 160 CF_ADDRMASK(2) | \ 161 CF_ACR_EN | CF_ACR_SM_ALL) 162#define CONFIG_SYS_CACHE_ACR1 (CONFIG_SYS_SDRAM_BASE | \ 163 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 164 CF_ACR_EN | CF_ACR_SM_ALL) 165#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CEIB | \ 166 CF_CACR_DBWE) 167 168/* Port configuration */ 169#define CONFIG_SYS_FECI2C 0xF0 170 171#define CONFIG_SYS_CS0_BASE 0xFFE00000 172#define CONFIG_SYS_CS0_MASK 0x001F0021 173#define CONFIG_SYS_CS0_CTRL 0x00001D80 174 175/*----------------------------------------------------------------------- 176 * Port configuration 177 */ 178#define CONFIG_SYS_GPIO_FUNC 0x00000008 /* Set gpio pins: none */ 179#define CONFIG_SYS_GPIO1_FUNC 0x00df00f0 /* 36-39(SWITCH),48-52(FPGAs),54 */ 180#define CONFIG_SYS_GPIO_EN 0x00000008 /* Set gpio output enable */ 181#define CONFIG_SYS_GPIO1_EN 0x00c70000 /* Set gpio output enable */ 182#define CONFIG_SYS_GPIO_OUT 0x00000008 /* Set outputs to default state */ 183#define CONFIG_SYS_GPIO1_OUT 0x00c70000 /* Set outputs to default state */ 184#define CONFIG_SYS_GPIO1_LED 0x00400000 /* user led */ 185 186#endif /* _M5253EVB_H */ 187