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18#ifndef __CONFIG_H
19#define __CONFIG_H
20
21#define CONFIG_DISPLAY_BOARDINFO
22
23
24#define CONFIG_BOOKE 1
25#define CONFIG_E500 1
26#define CONFIG_MPC8540 1
27#define CONFIG_MPC8540ADS 1
28
29
30
31
32
33#define CONFIG_SYS_TEXT_BASE 0xfff80000
34
35#ifndef CONFIG_HAS_FEC
36#define CONFIG_HAS_FEC 1
37#endif
38
39#define CONFIG_PCI
40#define CONFIG_PCI_INDIRECT_BRIDGE
41#define CONFIG_SYS_PCI_64BIT 1
42#define CONFIG_TSEC_ENET
43#define CONFIG_ENV_OVERWRITE
44#define CONFIG_FSL_LAW 1
45
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62
63
64#ifndef CONFIG_SYS_CLK_FREQ
65#define CONFIG_SYS_CLK_FREQ 33000000
66#endif
67
68
69
70
71#define CONFIG_L2_CACHE
72#define CONFIG_BTB
73
74#define CONFIG_SYS_MEMTEST_START 0x00200000
75#define CONFIG_SYS_MEMTEST_END 0x00400000
76
77#define CONFIG_SYS_CCSRBAR 0xe0000000
78#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
79
80
81#define CONFIG_SYS_FSL_DDR1
82#define CONFIG_SPD_EEPROM
83#define CONFIG_DDR_SPD
84#undef CONFIG_FSL_DDR_INTERACTIVE
85
86#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
87
88#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
89#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
90
91#define CONFIG_NUM_DDR_CONTROLLERS 1
92#define CONFIG_DIMM_SLOTS_PER_CTLR 1
93#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
94
95
96#define SPD_EEPROM_ADDRESS 0x51
97
98
99#define CONFIG_SYS_SDRAM_SIZE 128
100#define CONFIG_SYS_DDR_CS0_BNDS 0x00000007
101#define CONFIG_SYS_DDR_CS0_CONFIG 0x80000002
102#define CONFIG_SYS_DDR_TIMING_1 0x37344321
103#define CONFIG_SYS_DDR_TIMING_2 0x00000800
104#define CONFIG_SYS_DDR_CONTROL 0xc2000000
105#define CONFIG_SYS_DDR_MODE 0x00000062
106#define CONFIG_SYS_DDR_INTERVAL 0x05200100
107
108
109
110
111#define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000
112#define CONFIG_SYS_LBC_SDRAM_SIZE 64
113
114#define CONFIG_SYS_FLASH_BASE 0xff000000
115#define CONFIG_SYS_BR0_PRELIM 0xff001801
116
117#define CONFIG_SYS_OR0_PRELIM 0xff006ff7
118#define CONFIG_SYS_MAX_FLASH_BANKS 1
119#define CONFIG_SYS_MAX_FLASH_SECT 64
120#undef CONFIG_SYS_FLASH_CHECKSUM
121#define CONFIG_SYS_FLASH_ERASE_TOUT 60000
122#define CONFIG_SYS_FLASH_WRITE_TOUT 500
123
124#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
125
126#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
127#define CONFIG_SYS_RAMBOOT
128#else
129#undef CONFIG_SYS_RAMBOOT
130#endif
131
132#define CONFIG_FLASH_CFI_DRIVER
133#define CONFIG_SYS_FLASH_CFI
134#define CONFIG_SYS_FLASH_EMPTY_INFO
135
136#undef CONFIG_CLOCKS_IN_MHZ
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159
160#define CONFIG_SYS_BR2_PRELIM 0xf0001861
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175
176#define CONFIG_SYS_OR2_PRELIM 0xfc006901
177
178#define CONFIG_SYS_LBC_LCRR 0x00030004
179#define CONFIG_SYS_LBC_LBCR 0x00000000
180#define CONFIG_SYS_LBC_LSRT 0x20000000
181#define CONFIG_SYS_LBC_MRTPR 0x20000000
182
183#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_BSMA1516 \
184 | LSDMR_RFCR5 \
185 | LSDMR_PRETOACT3 \
186 | LSDMR_ACTTORW3 \
187 | LSDMR_BL8 \
188 | LSDMR_WRC2 \
189 | LSDMR_CL3 \
190 | LSDMR_RFEN \
191 )
192
193
194
195
196#define CONFIG_SYS_LBC_LSDMR_1 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_PCHALL)
197#define CONFIG_SYS_LBC_LSDMR_2 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
198#define CONFIG_SYS_LBC_LSDMR_3 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
199#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW)
200#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL)
201
202
203
204
205#define CONFIG_SYS_BR4_PRELIM 0xf8000801
206#define CONFIG_SYS_OR4_PRELIM 0xffffe1f1
207#define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000)
208
209#define CONFIG_SYS_INIT_RAM_LOCK 1
210#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000
211#define CONFIG_SYS_INIT_RAM_SIZE 0x4000
212
213#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
214#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
215
216#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
217#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
218
219
220#define CONFIG_CONS_INDEX 1
221#define CONFIG_SYS_NS16550_SERIAL
222#define CONFIG_SYS_NS16550_REG_SIZE 1
223#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
224
225#define CONFIG_SYS_BAUDRATE_TABLE \
226 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
227
228#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
229#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
230
231
232
233
234#define CONFIG_SYS_I2C
235#define CONFIG_SYS_I2C_FSL
236#define CONFIG_SYS_FSL_I2C_SPEED 400000
237#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
238#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
239#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }
240
241
242#define CONFIG_SYS_RIO_MEM_VIRT 0xc0000000
243#define CONFIG_SYS_RIO_MEM_BUS 0xc0000000
244#define CONFIG_SYS_RIO_MEM_PHYS 0xc0000000
245#define CONFIG_SYS_RIO_MEM_SIZE 0x20000000
246
247
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249
250
251#define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000
252#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000
253#define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000
254#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000
255#define CONFIG_SYS_PCI1_IO_VIRT 0xe2000000
256#define CONFIG_SYS_PCI1_IO_BUS 0x00000000
257#define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000
258#define CONFIG_SYS_PCI1_IO_SIZE 0x100000
259
260#if defined(CONFIG_PCI)
261
262#define CONFIG_PCI_PNP
263
264#undef CONFIG_EEPRO100
265#undef CONFIG_TULIP
266
267#if !defined(CONFIG_PCI_PNP)
268 #define PCI_ENET0_IOADDR 0xe0000000
269 #define PCI_ENET0_MEMADDR 0xe0000000
270 #define PCI_IDSEL_NUMBER 0x0c
271#endif
272
273#undef CONFIG_PCI_SCAN_SHOW
274#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1057
275
276#endif
277
278#if defined(CONFIG_TSEC_ENET)
279
280#define CONFIG_MII 1
281#define CONFIG_TSEC1 1
282#define CONFIG_TSEC1_NAME "TSEC0"
283#define CONFIG_TSEC2 1
284#define CONFIG_TSEC2_NAME "TSEC1"
285#define TSEC1_PHY_ADDR 0
286#define TSEC2_PHY_ADDR 1
287#define TSEC1_PHYIDX 0
288#define TSEC2_PHYIDX 0
289#define TSEC1_FLAGS TSEC_GIGABIT
290#define TSEC2_FLAGS TSEC_GIGABIT
291
292#if CONFIG_HAS_FEC
293#define CONFIG_MPC85XX_FEC 1
294#define CONFIG_MPC85XX_FEC_NAME "FEC"
295#define FEC_PHY_ADDR 3
296#define FEC_PHYIDX 0
297#define FEC_FLAGS 0
298#endif
299
300
301#define CONFIG_ETHPRIME "TSEC0"
302
303#endif
304
305
306
307
308#ifndef CONFIG_SYS_RAMBOOT
309 #define CONFIG_ENV_IS_IN_FLASH 1
310 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0x40000)
311 #define CONFIG_ENV_SECT_SIZE 0x40000
312 #define CONFIG_ENV_SIZE 0x2000
313#else
314 #define CONFIG_SYS_NO_FLASH 1
315 #define CONFIG_ENV_IS_NOWHERE 1
316 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000)
317 #define CONFIG_ENV_SIZE 0x2000
318#endif
319
320#define CONFIG_LOADS_ECHO 1
321#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
322
323
324
325
326#define CONFIG_BOOTP_BOOTFILESIZE
327#define CONFIG_BOOTP_BOOTPATH
328#define CONFIG_BOOTP_GATEWAY
329#define CONFIG_BOOTP_HOSTNAME
330
331
332
333
334#define CONFIG_CMD_IRQ
335
336#if defined(CONFIG_PCI)
337 #define CONFIG_CMD_PCI
338#endif
339
340#undef CONFIG_WATCHDOG
341
342
343
344
345#define CONFIG_SYS_LONGHELP
346#define CONFIG_CMDLINE_EDITING
347#define CONFIG_AUTO_COMPLETE
348#define CONFIG_SYS_LOAD_ADDR 0x2000000
349
350#if defined(CONFIG_CMD_KGDB)
351 #define CONFIG_SYS_CBSIZE 1024
352#else
353 #define CONFIG_SYS_CBSIZE 256
354#endif
355
356#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
357#define CONFIG_SYS_MAXARGS 16
358#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
359
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361
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363
364
365#define CONFIG_SYS_BOOTMAPSZ (64 << 20)
366#define CONFIG_SYS_BOOTM_LEN (64 << 20)
367
368#if defined(CONFIG_CMD_KGDB)
369#define CONFIG_KGDB_BAUDRATE 230400
370#endif
371
372
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374
375
376
377#if defined(CONFIG_TSEC_ENET)
378#define CONFIG_HAS_ETH0
379#define CONFIG_HAS_ETH1
380#define CONFIG_HAS_ETH2
381#endif
382
383#define CONFIG_IPADDR 192.168.1.253
384
385#define CONFIG_HOSTNAME unknown
386#define CONFIG_ROOTPATH "/nfsroot"
387#define CONFIG_BOOTFILE "your.uImage"
388
389#define CONFIG_SERVERIP 192.168.1.1
390#define CONFIG_GATEWAYIP 192.168.1.1
391#define CONFIG_NETMASK 255.255.255.0
392
393#define CONFIG_LOADADDR 200000
394
395#undef CONFIG_BOOTARGS
396
397#define CONFIG_BAUDRATE 115200
398
399#define CONFIG_EXTRA_ENV_SETTINGS \
400 "netdev=eth0\0" \
401 "consoledev=ttyS0\0" \
402 "ramdiskaddr=1000000\0" \
403 "ramdiskfile=your.ramdisk.u-boot\0" \
404 "fdtaddr=400000\0" \
405 "fdtfile=your.fdt.dtb\0"
406
407#define CONFIG_NFSBOOTCOMMAND \
408 "setenv bootargs root=/dev/nfs rw " \
409 "nfsroot=$serverip:$rootpath " \
410 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
411 "console=$consoledev,$baudrate $othbootargs;" \
412 "tftp $loadaddr $bootfile;" \
413 "tftp $fdtaddr $fdtfile;" \
414 "bootm $loadaddr - $fdtaddr"
415
416#define CONFIG_RAMBOOTCOMMAND \
417 "setenv bootargs root=/dev/ram rw " \
418 "console=$consoledev,$baudrate $othbootargs;" \
419 "tftp $ramdiskaddr $ramdiskfile;" \
420 "tftp $loadaddr $bootfile;" \
421 "tftp $fdtaddr $fdtfile;" \
422 "bootm $loadaddr $ramdiskaddr $fdtaddr"
423
424#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
425
426#endif
427