uboot/include/configs/a3m071.h
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   1/*
   2 * Copyright 2012-2013 Stefan Roese <sr@denx.de>
   3 *
   4 * SPDX-License-Identifier:     GPL-2.0+
   5 */
   6
   7#ifndef __CONFIG_H
   8#define __CONFIG_H
   9
  10/*
  11 * High Level Configuration Options
  12 * (easy to change)
  13 */
  14
  15#define CONFIG_MPC5200
  16#define CONFIG_A3M071                   /* A3M071 board */
  17#define CONFIG_DISPLAY_BOARDINFO
  18
  19#define CONFIG_SYS_TEXT_BASE    0x01000000      /* boot low for 32 MiB boards */
  20
  21#define CONFIG_SPL_TARGET       "u-boot-img.bin"
  22
  23#define CONFIG_SYS_MPC5XXX_CLKIN        33000000 /* ... running at 33MHz */
  24
  25#define CONFIG_MISC_INIT_R
  26#define CONFIG_SYS_LOWBOOT              /* Enable lowboot       */
  27
  28#ifdef CONFIG_A4M2K
  29#define CONFIG_HOSTNAME         a4m2k
  30#else
  31#define CONFIG_HOSTNAME         a3m071
  32#endif
  33
  34#define CONFIG_BOOTCOUNT_LIMIT
  35
  36/*
  37 * Serial console configuration
  38 */
  39#define CONFIG_PSC_CONSOLE      1           /* console is on PSC1 */
  40#define CONFIG_BAUDRATE         115200  /* ... at 115200 bps */
  41#define CONFIG_SYS_BAUDRATE_TABLE               \
  42        { 9600, 19200, 38400, 57600, 115200, 230400 }
  43
  44/*
  45 * Command line configuration.
  46 */
  47#define CONFIG_CMD_BSP
  48#define CONFIG_CMD_REGINFO
  49#define CONFIG_BOOTP_SEND_HOSTNAME
  50#define CONFIG_BOOTP_SERVERIP
  51#define CONFIG_BOOTP_MAY_FAIL
  52#define CONFIG_BOOTP_BOOTPATH
  53#define CONFIG_BOOTP_GATEWAY
  54#define CONFIG_BOOTP_SERVERIP
  55#define CONFIG_NET_RETRY_COUNT 3
  56#define CONFIG_NETCONSOLE
  57#define CONFIG_SYS_CONSOLE_IS_IN_ENV
  58#define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
  59#define CONFIG_MTD_PARTITIONS   /* needed for UBI */
  60#define CONFIG_FLASH_CFI_MTD
  61#define MTDIDS_DEFAULT          "nor0=fc000000.flash"
  62#define MTDPARTS_DEFAULT        "mtdparts=fc000000.flash:512k(u-boot)," \
  63                                                "128k(env1),"   \
  64                                                "128k(env2),"   \
  65                                                "128k(hwinfo)," \
  66                                                "1M(nvramsim)," \
  67                                                "128k(dtb),"    \
  68                                                "5M(kernel),"   \
  69                                                "128k(sysinfo),"        \
  70                                                "7552k(root),"  \
  71                                                "4M(app),"      \
  72                                                "5376k(data),"  \
  73                                                "8M(install)"
  74
  75#define CONFIG_LZO                      /* needed for UBI */
  76#define CONFIG_RBTREE                   /* needed for UBI */
  77#define CONFIG_CMD_MTDPARTS
  78#define CONFIG_CMD_UBI
  79#define CONFIG_CMD_UBIFS
  80
  81/*
  82 * IPB Bus clocking configuration.
  83 */
  84#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK         /* define for 133MHz speed */
  85/* define for 66MHz speed - undef for 33MHz PCI clock speed */
  86#ifdef CONFIG_A4M2K
  87#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
  88#else
  89#undef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
  90#endif
  91
  92/* maximum size of the flat tree (8K) */
  93#define OF_FLAT_TREE_MAX_SIZE   8192
  94
  95#define OF_CPU                  "PowerPC,5200@0"
  96#define OF_SOC                  "soc5200@f0000000"
  97#define OF_TBCLK                (bd->bi_busfreq / 4)
  98#define OF_STDOUT_PATH          "/soc5200@f0000000/serial@2000"
  99
 100/*
 101 * NOR flash configuration
 102 */
 103#define CONFIG_SYS_FLASH_BASE           0xfc000000
 104#define CONFIG_SYS_FLASH_SIZE           0x02000000
 105#define CONFIG_ENV_ADDR                 (CONFIG_SYS_FLASH_BASE + 0x80000)
 106
 107#define CONFIG_SYS_MAX_FLASH_BANKS      1
 108#define CONFIG_SYS_MAX_FLASH_SECT       256
 109#define CONFIG_SYS_FLASH_ERASE_TOUT     240000
 110#define CONFIG_SYS_FLASH_WRITE_TOUT     500
 111#define CONFIG_SYS_FLASH_LOCK_TOUT      5
 112#define CONFIG_SYS_FLASH_UNLOCK_TOUT    10000
 113#define CONFIG_SYS_FLASH_PROTECTION
 114#define CONFIG_FLASH_CFI_DRIVER
 115#define CONFIG_SYS_FLASH_CFI
 116#define CONFIG_SYS_FLASH_EMPTY_INFO
 117#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 118#define CONFIG_FLASH_VERIFY
 119
 120/*
 121 * Environment settings
 122 */
 123#define CONFIG_ENV_IS_IN_FLASH
 124#define CONFIG_ENV_SIZE         0x10000
 125#define CONFIG_ENV_SECT_SIZE    0x20000
 126#define CONFIG_ENV_OVERWRITE
 127#define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
 128#define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
 129
 130/*
 131 * Memory map
 132 */
 133#define CONFIG_SYS_MBAR                 0xf0000000
 134#define CONFIG_SYS_SDRAM_BASE           0x00000000
 135#define CONFIG_SYS_DEFAULT_MBAR         0x80000000
 136
 137/* Use SRAM until RAM will be available */
 138#define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
 139#define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_SIZE
 140
 141#define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
 142                                         GENERATED_GBL_DATA_SIZE)
 143#define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 144
 145#define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_TEXT_BASE
 146
 147#define CONFIG_SYS_MONITOR_LEN          (512 << 10)
 148#define CONFIG_SYS_MALLOC_LEN           (4 << 20)
 149#define CONFIG_SYS_BOOTMAPSZ            (8 << 20)
 150
 151/*
 152 * Ethernet configuration
 153 */
 154#define CONFIG_MPC5xxx_FEC
 155#define CONFIG_MPC5xxx_FEC_MII100
 156#ifdef CONFIG_A4M2K
 157#define CONFIG_PHY_ADDR                 0x01
 158#else
 159#define CONFIG_PHY_ADDR                 0x00
 160#endif
 161
 162/*
 163 * GPIO configuration
 164 */
 165
 166/*
 167 * GPIO-config depends on failsave-level
 168 * failsave 0 means just MPX-config, no digiboard, no fpga
 169 *          1 means digiboard ok
 170 *          2 means fpga ok
 171 */
 172
 173#ifdef CONFIG_A4M2K
 174#define CONFIG_SYS_GPS_PORT_CONFIG      0x1005C805
 175#else
 176/* for failsave-level 0 - full failsave */
 177#define CONFIG_SYS_GPS_PORT_CONFIG      0x1005C005
 178/* for failsave-level 1 - only digiboard ok */
 179#define CONFIG_SYS_GPS_PORT_CONFIG_1    0x1005C065
 180/* for failsave-level 2 - all ok */
 181#define CONFIG_SYS_GPS_PORT_CONFIG_2    0x1005C065
 182#endif
 183
 184#define CONFIG_WDOG_GPIO_PIN            GPIO_WKUP_7
 185#if defined(CONFIG_A4M2K) && !defined(CONFIG_SPL_BUILD)
 186#define CONFIG_HW_WATCHDOG              /* Use external HW-Watchdog     */
 187#endif
 188
 189/*
 190 * Configuration matrix
 191 *                        MSB                            LSB
 192 * failsave 0  0x1005C005  00010000000001011100000000000101  ( full failsave )
 193 * failsave 1  0x1005C065  00010000000001011100000001100101  ( digib.-ver ok )
 194 * failsave 2  0x1005C065  00010000000001011100000001100101  ( all ok )
 195 *                         || ||| ||  |   ||| |   |   |   |
 196 *                         || ||| ||  |   ||| |   |   |   |  bit rev name
 197 *                         ++-+++-++--+---+++-+---+---+---+-  0   31 CS1
 198 *                          +-+++-++--+---+++-+---+---+---+-  1   30 LPTZ
 199 *                            ||| ||  |   ||| |   |   |   |   2   29 ALTs
 200 *                            +++-++--+---+++-+---+---+---+-  3   28 ALTs
 201 *                             ++-++--+---+++-+---+---+---+-  4   27 CS7
 202 *                              +-++--+---+++-+---+---+---+-  5   26 CS6
 203 *                                ||  |   ||| |   |   |   |   6   25 ATA
 204 *                                ++--+---+++-+---+---+---+-  7   24 ATA
 205 *                                 +--+---+++-+---+---+---+-  8   23 IR_USB_CLK
 206 *                                    |   ||| |   |   |   |   9   22 IRDA
 207 *                                    |   ||| |   |   |   |  10   21 IRDA
 208 *                                    +---+++-+---+---+---+- 11   20 IRDA
 209 *                                        ||| |   |   |   |  12   19 Ether
 210 *                                        ||| |   |   |   |  13   18 Ether
 211 *                                        ||| |   |   |   |  14   17 Ether
 212 *                                        +++-+---+---+---+- 15   16 Ether
 213 *                                         ++-+---+---+---+- 16   15 PCI_DIS
 214 *                                          +-+---+---+---+- 17   14 USB_SE
 215 *                                            |   |   |   |  18   13 USB
 216 *                                            +---+---+---+- 19   12 USB
 217 *                                                |   |   |  20   11 PSC3
 218 *                                                |   |   |  21   10 PSC3
 219 *                                                |   |   |  22    9 PSC3
 220 *                                                +---+---+- 23    8 PSC3
 221 *                                                    |   |  24    7 -
 222 *                                                    |   |  25    6 PSC2
 223 *                                                    |   |  26    5 PSC2
 224 *                                                    +---+- 27    4 PSC2
 225 *                                                        |  28    3 -
 226 *                                                        |  29    2 PSC1
 227 *                                                        |  30    1 PSC1
 228 *                                                        +- 31    0 PSC1
 229 */
 230
 231/*
 232 * Miscellaneous configurable options
 233 */
 234#define CONFIG_SYS_LONGHELP
 235
 236#define CONFIG_CMDLINE_EDITING
 237
 238#if defined(CONFIG_CMD_KGDB)
 239#define CONFIG_SYS_CBSIZE               1024
 240#else
 241#define CONFIG_SYS_CBSIZE               256
 242#endif
 243#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 244#define CONFIG_SYS_MAXARGS              16
 245#define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 246
 247#define CONFIG_SYS_MEMTEST_START        0x00100000
 248#define CONFIG_SYS_MEMTEST_END          0x00f00000
 249
 250#define CONFIG_SYS_LOAD_ADDR            0x00100000
 251
 252#define CONFIG_SYS_CONSOLE_INFO_QUIET   /* don't print console @ startup*/
 253
 254/*
 255 * Various low-level settings
 256 */
 257#define CONFIG_SYS_HID0_INIT            (HID0_ICE | HID0_ICFI)
 258#define CONFIG_SYS_HID0_FINAL           HID0_ICE
 259
 260#define CONFIG_SYS_BOOTCS_START         CONFIG_SYS_FLASH_BASE
 261#define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 262#define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
 263#define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 264
 265#ifdef CONFIG_A4M2K
 266/* external MRAM */
 267#define CONFIG_SYS_CS1_START            0xf1000000
 268#define CONFIG_SYS_CS1_SIZE             (512 << 10)     /* 512KiB MRAM */
 269#endif
 270
 271#define CONFIG_SYS_CS2_START            0xe0000000
 272#define CONFIG_SYS_CS2_SIZE             0x00100000
 273
 274/* FPGA slave io (512kiB / 1MiB) - see ticket #66 */
 275#define CONFIG_SYS_CS3_START            0xE9000000
 276#ifdef CONFIG_A4M2K
 277#define CONFIG_SYS_CS3_SIZE             0x00100000
 278#else
 279#define CONFIG_SYS_CS3_SIZE             0x00080000
 280#endif
 281/* 00000000 00110010 1 0 1 1 10 01 00 00 0 0 0 0  = 0x0032B900 */
 282#define CONFIG_SYS_CS3_CFG              0x0032B900
 283
 284#ifndef CONFIG_A4M2K
 285/* Diagnosis Interface - see ticket #63 */
 286#define CONFIG_SYS_CS4_START            0xEA000000
 287#define CONFIG_SYS_CS4_SIZE             0x00000001
 288/* 00000000 00000010 1 0 1 1 10 01 00 00 0 0 0 0  = 0x0002B900 */
 289#define CONFIG_SYS_CS4_CFG              0x0002B900
 290#endif
 291
 292/* FPGA master io (64kiB / 1MiB) - see ticket #66 */
 293#define CONFIG_SYS_CS5_START            0xE8000000
 294#ifdef CONFIG_A4M2K
 295#define CONFIG_SYS_CS5_SIZE             0x00100000
 296#else
 297#define CONFIG_SYS_CS5_SIZE             0x00010000
 298#endif
 299/* 00000000 00110010 1 0 1 1 10 01 00 00 0 0 0 0  = 0x0032B900 */
 300#define CONFIG_SYS_CS5_CFG              0x0032B900
 301
 302#ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2     /* for pci_clk  = 66 MHz */
 303#define CONFIG_SYS_BOOTCS_CFG           0x0006F900
 304#define CONFIG_SYS_CS1_CFG              0x0008FD00
 305#define CONFIG_SYS_CS2_CFG              0x0006F90C
 306#else   /* for pci_clk = 33 MHz */
 307#define CONFIG_SYS_BOOTCS_CFG           0x0002F900
 308#define CONFIG_SYS_CS1_CFG              0x0001FB00
 309#define CONFIG_SYS_CS2_CFG              0x0002F90C
 310#endif
 311
 312#define CONFIG_SYS_CS_BURST             0x00000000
 313/* set DC for FPGA CS5 and CS3 to 0 - see ticket #66 */
 314/* R  7  R  6  R  5  R  4  R  3  R  2  R  1  R  0  */
 315/* 00 11 00 11 00 00 00 11 00 00 00 00 00 00 00 00 */
 316#define CONFIG_SYS_CS_DEADCYCLE         0x33030000
 317
 318#define CONFIG_SYS_RESET_ADDRESS        0xff000000
 319
 320/*
 321 * Environment Configuration
 322 */
 323
 324#undef  CONFIG_BOOTARGS
 325
 326#define CONFIG_SYS_AUTOLOAD     "n"
 327
 328#define CONFIG_PREBOOT  "echo;" \
 329        "echo Type \"run flash_mtd\" to boot from flash with mtd filesystem;" \
 330        "echo Type \"run net_nfs\" to boot from tftp with nfs filesystem;" \
 331        "echo"
 332
 333#undef  CONFIG_BOOTARGS
 334
 335#define CONFIG_SYS_OS_BASE      0xfc200000
 336#define CONFIG_SYS_FDT_BASE     0xfc1e0000
 337
 338#define CONFIG_EXTRA_ENV_SETTINGS                                       \
 339        "netdev=eth0\0"                                                 \
 340        "verify=no\0"                                                   \
 341        "loadaddr=200000\0"                                             \
 342        "kernel_addr=" __stringify(CONFIG_SYS_OS_BASE) "\0"             \
 343        "kernel_addr_r=1000000\0"                                       \
 344        "fdt_addr=" __stringify(CONFIG_SYS_FDT_BASE) "\0"               \
 345        "fdt_addr_r=1800000\0"                                          \
 346        "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"            \
 347        "fdtfile=" __stringify(CONFIG_HOSTNAME) "/"                     \
 348                __stringify(CONFIG_HOSTNAME) ".dtb\0"                   \
 349        "rootpath=/opt/eldk-5.2.1/powerpc/"                             \
 350                "core-image-minimal-mtdutils-dropbear-generic\0"        \
 351        "consoledev=ttyPSC0\0"                                          \
 352        "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 353                "nfsroot=${serverip}:${rootpath}\0"                     \
 354        "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 355        "mtdargs=setenv bootargs root=/dev/mtdblock8 "                  \
 356                "rootfstype=squashfs,jffs2\0"                           \
 357        "addhost=setenv bootargs ${bootargs} "                          \
 358                "hostname=${hostname}\0"                                \
 359        "addip=setenv bootargs ${bootargs} "                            \
 360                "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 361                ":${hostname}:${netdev}:off panic=1\0"                  \
 362        "addtty=setenv bootargs ${bootargs} "                           \
 363                "console=${consoledev},${baudrate}\0"                   \
 364        "flash_nfs=run nfsargs addip addtty addmtd addhost;"            \
 365                "bootm ${kernel_addr} - ${fdt_addr}\0"                  \
 366        "flash_mtd=run mtdargs addip addtty addmtd addhost;"            \
 367                "bootm ${kernel_addr} - ${fdt_addr}\0"                  \
 368        "flash_self=run ramargs addip addtty addmtd addhost;"           \
 369                "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0"    \
 370        "net_nfs=tftp ${kernel_addr_r} ${bootfile};"                    \
 371                "tftp ${fdt_addr_r} ${fdtfile};"                        \
 372                "run nfsargs addip addtty addmtd addhost;"              \
 373                "bootm ${kernel_addr_r} - ${fdt_addr_r}\0"              \
 374        "load=tftp ${loadaddr} " __stringify(CONFIG_HOSTNAME)           \
 375                "/u-boot-img.bin\0"                                     \
 376        "update=protect off fc000000 fc07ffff;"                         \
 377                "era fc000000 fc07ffff;"                                \
 378                "cp.b ${loadaddr} fc000000 ${filesize}\0"               \
 379        "upd=run load;run update\0"                                     \
 380        "upd_fdt=tftp 1800000 a3m071/a3m071.dtb;"                       \
 381                "run mtdargs addip addtty addmtd addhost;"              \
 382                "fdt addr 1800000;fdt boardsetup;fdt chosen;"           \
 383                "erase fc1e0000 fc1fffff;cp.b 1800000 fc1e0000 20000"   \
 384        "upd_kernel=tftp 1000000 a3m071/uImage-uncompressed;"           \
 385                "erase fc200000 fc6fffff;"                              \
 386                "cp.b 1000000 fc200000 ${filesize}"                     \
 387        "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
 388        "mtdids=" MTDIDS_DEFAULT "\0"                                   \
 389        "mtdparts=" MTDPARTS_DEFAULT "\0"                               \
 390        ""
 391
 392#define CONFIG_BOOTCOMMAND      "run flash_mtd"
 393
 394/*
 395 * SPL related defines
 396 */
 397#define CONFIG_SPL_FRAMEWORK
 398#define CONFIG_SPL_BOARD_INIT
 399#define CONFIG_SPL_NOR_SUPPORT
 400#define CONFIG_SPL_TEXT_BASE    0xfc000000
 401#define CONFIG_SPL_LIBCOMMON_SUPPORT    /* image.c */
 402#define CONFIG_SPL_LIBGENERIC_SUPPORT   /* string.c */
 403#define CONFIG_SPL_SERIAL_SUPPORT
 404
 405/* Place BSS for SPL near end of SDRAM */
 406#define CONFIG_SPL_BSS_START_ADDR       ((128 - 1) << 20)
 407#define CONFIG_SPL_BSS_MAX_SIZE         (64 << 10)
 408
 409#define CONFIG_SPL_OS_BOOT
 410#define CONFIG_SPL_ENV_SUPPORT
 411/* Place patched DT blob (fdt) at this address */
 412#define CONFIG_SYS_SPL_ARGS_ADDR        0x01800000
 413
 414/* Settings for real U-Boot to be loaded from NOR flash */
 415#ifndef __ASSEMBLY__
 416extern char __spl_flash_end[];
 417#endif
 418#define CONFIG_SYS_UBOOT_BASE           __spl_flash_end
 419#define CONFIG_SYS_SPL_MAX_LEN          (32 << 10)
 420#define CONFIG_SYS_UBOOT_START          0x1000100
 421
 422#endif /* __CONFIG_H */
 423