uboot/include/configs/ap_sh4a_4a.h
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   1/*
   2 * Configuation settings for the Alpha Project AP-SH4A-4A board
   3 *
   4 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
   5 *
   6 * SPDX-License-Identifier:     GPL-2.0+
   7 */
   8
   9#ifndef __AP_SH4A_4A_H
  10#define __AP_SH4A_4A_H
  11
  12#undef DEBUG
  13#define CONFIG_CPU_SH7734       1
  14#define CONFIG_AP_SH4A_4A       1
  15#define CONFIG_400MHZ_MODE      1
  16/* #define CONFIG_533MHZ_MODE   1 */
  17
  18#define CONFIG_BOARD_LATE_INIT
  19#define CONFIG_SYS_TEXT_BASE 0x8BFC0000
  20
  21#define CONFIG_CMD_SDRAM
  22#define CONFIG_CMD_ENV
  23
  24#define CONFIG_BAUDRATE         115200
  25#define CONFIG_BOOTARGS         "console=ttySC4,115200"
  26
  27#define CONFIG_VERSION_VARIABLE
  28#undef  CONFIG_SHOW_BOOT_PROGRESS
  29
  30/* Ether */
  31#define CONFIG_SH_ETHER 1
  32#define CONFIG_SH_ETHER_USE_PORT (0)
  33#define CONFIG_SH_ETHER_PHY_ADDR (0x0)
  34#define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII)
  35#define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */
  36#define CONFIG_PHYLIB
  37#define CONFIG_PHY_MICREL 1
  38#define CONFIG_BITBANGMII
  39#define CONFIG_BITBANGMII_MULTI
  40
  41/* I2C */
  42#define CONFIG_SH_SH7734_I2C    1
  43#define CONFIG_HARD_I2C                 1
  44#define CONFIG_I2C_MULTI_BUS    1
  45#define CONFIG_SYS_MAX_I2C_BUS  2
  46#define CONFIG_SYS_I2C_MODULE   0
  47#define CONFIG_SYS_I2C_SPEED    400000 /* 400 kHz */
  48#define CONFIG_SYS_I2C_SLAVE    0x50
  49#define CONFIG_SH_I2C_DATA_HIGH 4
  50#define CONFIG_SH_I2C_DATA_LOW  5
  51#define CONFIG_SH_I2C_CLOCK             500000000
  52#define CONFIG_SH_I2C_BASE0             0xFFC70000
  53#define CONFIG_SH_I2C_BASE1             0xFFC71000
  54
  55/* undef to save memory */
  56#define CONFIG_SYS_LONGHELP
  57/* Monitor Command Prompt */
  58/* Buffer size for input from the Console */
  59#define CONFIG_SYS_CBSIZE               256
  60/* Buffer size for Console output */
  61#define CONFIG_SYS_PBSIZE               256
  62/* max args accepted for monitor commands */
  63#define CONFIG_SYS_MAXARGS              16
  64/* Buffer size for Boot Arguments passed to kernel */
  65#define CONFIG_SYS_BARGSIZE     512
  66/* List of legal baudrate settings for this board */
  67#define CONFIG_SYS_BAUDRATE_TABLE       { 115200 }
  68
  69/* SCIF */
  70#define CONFIG_SCIF_CONSOLE     1
  71#define CONFIG_SCIF                     1
  72#define CONFIG_CONS_SCIF4       1
  73
  74/* Suppress display of console information at boot */
  75#undef  CONFIG_SYS_CONSOLE_INFO_QUIET
  76#undef  CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
  77#undef  CONFIG_SYS_CONSOLE_ENV_OVERWRITE
  78
  79/* SDRAM */
  80#define CONFIG_SYS_SDRAM_BASE   (0x88000000)
  81#define CONFIG_SYS_SDRAM_SIZE   (64 * 1024 * 1024)
  82#define CONFIG_SYS_LOAD_ADDR    (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
  83
  84#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
  85#define CONFIG_SYS_MEMTEST_END   (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE)
  86/* Enable alternate, more extensive, memory test */
  87#undef  CONFIG_SYS_ALT_MEMTEST
  88/* Scratch address used by the alternate memory test */
  89#undef  CONFIG_SYS_MEMTEST_SCRATCH
  90
  91/* Enable temporary baudrate change while serial download */
  92#undef  CONFIG_SYS_LOADS_BAUD_CHANGE
  93
  94/* FLASH */
  95#define CONFIG_FLASH_CFI_DRIVER 1
  96#define CONFIG_SYS_FLASH_CFI
  97#undef  CONFIG_SYS_FLASH_QUIET_TEST
  98#define CONFIG_SYS_FLASH_EMPTY_INFO
  99#define CONFIG_SYS_FLASH_BASE   (0xA0000000)
 100#define CONFIG_SYS_MAX_FLASH_SECT       512
 101
 102/* if you use all NOR Flash , you change dip-switch. Please see Manual. */
 103#define CONFIG_SYS_MAX_FLASH_BANKS      1
 104#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
 105
 106/* Timeout for Flash erase operations (in ms) */
 107#define CONFIG_SYS_FLASH_ERASE_TOUT     (3 * 1000)
 108/* Timeout for Flash write operations (in ms) */
 109#define CONFIG_SYS_FLASH_WRITE_TOUT     (3 * 1000)
 110/* Timeout for Flash set sector lock bit operations (in ms) */
 111#define CONFIG_SYS_FLASH_LOCK_TOUT      (3 * 1000)
 112/* Timeout for Flash clear lock bit operations (in ms) */
 113#define CONFIG_SYS_FLASH_UNLOCK_TOUT    (3 * 1000)
 114
 115/*
 116 * Use hardware flash sectors protection instead
 117 * of U-Boot software protection
 118 */
 119#undef  CONFIG_SYS_FLASH_PROTECTION
 120#undef  CONFIG_SYS_DIRECT_FLASH_TFTP
 121
 122/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
 123#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
 124/* Monitor size */
 125#define CONFIG_SYS_MONITOR_LEN  (256 * 1024)
 126/* Size of DRAM reserved for malloc() use */
 127#define CONFIG_SYS_MALLOC_LEN   (256 * 1024)
 128#define CONFIG_SYS_BOOTMAPSZ    (8 * 1024 * 1024)
 129
 130/* ENV setting */
 131#define CONFIG_ENV_IS_IN_FLASH
 132#define CONFIG_ENV_OVERWRITE    1
 133#define CONFIG_ENV_SECT_SIZE    (128 * 1024)
 134#define CONFIG_ENV_SIZE         (CONFIG_ENV_SECT_SIZE)
 135#define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
 136/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
 137#define CONFIG_ENV_OFFSET       (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
 138#define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SECT_SIZE)
 139
 140/* Board Clock */
 141#if defined(CONFIG_400MHZ_MODE)
 142#define CONFIG_SYS_CLK_FREQ 50000000
 143#else
 144#define CONFIG_SYS_CLK_FREQ 44444444
 145#endif
 146#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
 147#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 148#define CONFIG_SYS_TMU_CLK_DIV      4
 149
 150#endif  /* __AP_SH4A_4A_H */
 151