1/* 2 * Common configuration settings for the TI OMAP3 EVM board. 3 * 4 * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9#ifndef __OMAP3_EVM_COMMON_H 10#define __OMAP3_EVM_COMMON_H 11 12/* 13 * High level configuration options 14 */ 15#define CONFIG_OMAP /* This is TI OMAP core */ 16#define CONFIG_OMAP_GPIO 17#define CONFIG_OMAP_COMMON 18/* Common ARM Erratas */ 19#define CONFIG_ARM_ERRATA_454179 20#define CONFIG_ARM_ERRATA_430973 21#define CONFIG_ARM_ERRATA_621766 22 23#define CONFIG_SDRC /* The chip has SDRC controller */ 24 25#define CONFIG_OMAP3_EVM /* This is a OMAP3 EVM */ 26#define CONFIG_TWL4030_POWER /* with TWL4030 PMIC */ 27 28/* 29 * Clock related definitions 30 */ 31#define V_OSCK 26000000 /* Clock output from T2 */ 32#define V_SCLK (V_OSCK >> 1) 33 34/* 35 * OMAP3 has 12 GP timers, they can be driven by the system clock 36 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 37 * This rate is divided by a local divisor. 38 */ 39#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 40#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 41 42/* Size of environment - 128KB */ 43#define CONFIG_ENV_SIZE (128 << 10) 44 45/* Size of malloc pool */ 46#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 47 48/* 49 * Physical Memory Map 50 * Note 1: CS1 may or may not be populated 51 * Note 2: SDRAM size is expected to be at least 32MB 52 */ 53#define CONFIG_NR_DRAM_BANKS 2 54#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 55#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 56 57/* Limits for memtest */ 58#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 59#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 60 0x01F00000) /* 31MB */ 61 62/* Default load address */ 63#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) 64 65/* ----------------------------------------------------------------------------- 66 * Hardware drivers 67 * ----------------------------------------------------------------------------- 68 */ 69 70/* 71 * NS16550 Configuration 72 */ 73#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 74 75#define CONFIG_SYS_NS16550_SERIAL 76#define CONFIG_SYS_NS16550_REG_SIZE (-4) 77#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 78 79/* 80 * select serial console configuration 81 */ 82#define CONFIG_CONS_INDEX 1 83#define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */ 84#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 85#define CONFIG_BAUDRATE 115200 86#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 87 115200} 88 89/* 90 * I2C 91 */ 92#define CONFIG_SYS_I2C 93#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 94#define CONFIG_SYS_OMAP24_I2C_SLAVE 1 95#define CONFIG_SYS_I2C_OMAP34XX 96 97/* 98 * PISMO support 99 */ 100/* Monitor at start of flash - Reserve 2 sectors */ 101#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 102 103#define CONFIG_SYS_MONITOR_LEN (256 << 10) 104 105/* Start location & size of environment */ 106#define ONENAND_ENV_OFFSET 0x260000 107#define SMNAND_ENV_OFFSET 0x260000 108 109#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 110 111/* 112 * NAND 113 */ 114/* Physical address to access NAND */ 115#define CONFIG_SYS_NAND_ADDR NAND_BASE 116 117/* Physical address to access NAND at CS0 */ 118#define CONFIG_SYS_NAND_BASE NAND_BASE 119 120/* Max number of NAND devices */ 121#define CONFIG_SYS_MAX_NAND_DEVICE 1 122#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 123/* Timeout values (in ticks) */ 124#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) 125#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) 126 127/* Flash banks JFFS2 should use */ 128#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ 129 CONFIG_SYS_MAX_NAND_DEVICE) 130 131#define CONFIG_SYS_JFFS2_MEM_NAND 132#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS 133#define CONFIG_SYS_JFFS2_NUM_BANKS 1 134 135#define CONFIG_JFFS2_NAND 136/* nand device jffs2 lives on */ 137#define CONFIG_JFFS2_DEV "nand0" 138/* Start of jffs2 partition */ 139#define CONFIG_JFFS2_PART_OFFSET 0x680000 140/* Size of jffs2 partition */ 141#define CONFIG_JFFS2_PART_SIZE 0xf980000 142 143/* 144 * USB 145 */ 146#ifdef CONFIG_USB_OMAP3 147 148#ifdef CONFIG_USB_MUSB_HCD 149 150#define CONFIG_USB_STORAGE 151#define CONGIG_CMD_STORAGE 152 153#ifdef CONFIG_USB_KEYBOARD 154#define CONFIG_SYS_USB_EVENT_POLL 155#define CONFIG_PREBOOT "usb start" 156#endif /* CONFIG_USB_KEYBOARD */ 157 158#endif /* CONFIG_USB_MUSB_HCD */ 159 160#ifdef CONFIG_USB_MUSB_UDC 161/* USB device configuration */ 162#define CONFIG_USB_DEVICE 163#define CONFIG_USB_TTY 164#define CONFIG_SYS_CONSOLE_IS_IN_ENV 165 166/* Change these to suit your needs */ 167#define CONFIG_USBD_VENDORID 0x0451 168#define CONFIG_USBD_PRODUCTID 0x5678 169#define CONFIG_USBD_MANUFACTURER "Texas Instruments" 170#define CONFIG_USBD_PRODUCT_NAME "EVM" 171#endif /* CONFIG_USB_MUSB_UDC */ 172 173#endif /* CONFIG_USB_OMAP3 */ 174 175/* ---------------------------------------------------------------------------- 176 * U-Boot features 177 * ---------------------------------------------------------------------------- 178 */ 179#define CONFIG_SYS_MAXARGS 16 /* max args for a command */ 180 181#define CONFIG_MISC_INIT_R 182 183#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 184#define CONFIG_SETUP_MEMORY_TAGS 185#define CONFIG_INITRD_TAG 186#define CONFIG_REVISION_TAG 187 188/* Size of Console IO buffer */ 189#define CONFIG_SYS_CBSIZE 512 190 191/* Size of print buffer */ 192#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 193 sizeof(CONFIG_SYS_PROMPT) + 16) 194 195/* Size of bootarg buffer */ 196#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 197 198#define CONFIG_BOOTFILE "uImage" 199 200/* 201 * NAND / OneNAND 202 */ 203#if defined(CONFIG_CMD_NAND) 204#define CONFIG_SYS_FLASH_BASE NAND_BASE 205 206#define CONFIG_NAND_OMAP_GPMC 207#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 208#elif defined(CONFIG_CMD_ONENAND) 209#define CONFIG_SYS_FLASH_BASE ONENAND_MAP 210#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 211#endif 212 213#if !defined(CONFIG_ENV_IS_NOWHERE) 214#if defined(CONFIG_CMD_NAND) 215#define CONFIG_ENV_IS_IN_NAND 216#elif defined(CONFIG_CMD_ONENAND) 217#define CONFIG_ENV_IS_IN_ONENAND 218#define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET 219#endif 220#endif /* CONFIG_ENV_IS_NOWHERE */ 221 222#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET 223 224#if defined(CONFIG_CMD_NET) 225 226/* Ethernet (SMSC9115 from SMSC9118 family) */ 227#define CONFIG_SMC911X 228#define CONFIG_SMC911X_32_BIT 229#define CONFIG_SMC911X_BASE 0x2C000000 230 231/* BOOTP fields */ 232#define CONFIG_BOOTP_SUBNETMASK 0x00000001 233#define CONFIG_BOOTP_GATEWAY 0x00000002 234#define CONFIG_BOOTP_HOSTNAME 0x00000004 235#define CONFIG_BOOTP_BOOTPATH 0x00000010 236 237#endif /* CONFIG_CMD_NET */ 238 239/* Support for relocation */ 240#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 241#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 242#define CONFIG_SYS_INIT_RAM_SIZE 0x800 243#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 244 CONFIG_SYS_INIT_RAM_SIZE - \ 245 GENERATED_GBL_DATA_SIZE) 246 247/* ----------------------------------------------------------------------------- 248 * Board specific 249 * ----------------------------------------------------------------------------- 250 */ 251#define CONFIG_SYS_NO_FLASH 252 253/* Uncomment to define the board revision statically */ 254/* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */ 255 256#define CONFIG_SYS_CACHELINE_SIZE 64 257 258/* Defines for SPL */ 259#define CONFIG_SPL_FRAMEWORK 260#define CONFIG_SPL_TEXT_BASE 0x40200800 261#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ 262 263#define CONFIG_SPL_BSS_START_ADDR 0x80000000 264#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 265 266#define CONFIG_SPL_BOARD_INIT 267#define CONFIG_SPL_LIBCOMMON_SUPPORT 268#define CONFIG_SPL_LIBDISK_SUPPORT 269#define CONFIG_SPL_I2C_SUPPORT 270#define CONFIG_SPL_LIBGENERIC_SUPPORT 271#define CONFIG_SPL_SERIAL_SUPPORT 272#define CONFIG_SPL_POWER_SUPPORT 273#define CONFIG_SPL_OMAP3_ID_NAND 274#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 275 276/* 277 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 278 * 64 bytes before this address should be set aside for u-boot.img's 279 * header. That is 0x800FFFC0--0x80100000 should not be used for any 280 * other needs. 281 */ 282#define CONFIG_SYS_TEXT_BASE 0x80100000 283#define CONFIG_SYS_SPL_MALLOC_START 0x80208000 284#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 285 286#endif /* __OMAP3_EVM_COMMON_H */ 287