1/* 2 * ti_omap3_common.h 3 * 4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 * 8 * For more details, please see the technical documents listed at 9 * http://www.ti.com/product/omap3530 10 * http://www.ti.com/product/omap3630 11 * http://www.ti.com/product/dm3730 12 */ 13 14#ifndef __CONFIG_TI_OMAP3_COMMON_H__ 15#define __CONFIG_TI_OMAP3_COMMON_H__ 16 17/* 18 * High Level Configuration Options 19 */ 20 21#define CONFIG_SYS_CACHELINE_SIZE 64 22 23#include <asm/arch/cpu.h> 24#include <asm/arch/omap.h> 25 26/* Common ARM Erratas */ 27#define CONFIG_ARM_ERRATA_454179 28#define CONFIG_ARM_ERRATA_430973 29#define CONFIG_ARM_ERRATA_621766 30 31/* The chip has SDRC controller */ 32#define CONFIG_SDRC 33 34/* Clock Defines */ 35#define V_OSCK 26000000 /* Clock output from T2 */ 36#define V_SCLK (V_OSCK >> 1) 37 38/* NS16550 Configuration */ 39#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 40#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 41#ifdef CONFIG_SPL_BUILD 42# define CONFIG_SYS_NS16550_SERIAL 43# define CONFIG_SYS_NS16550_REG_SIZE (-4) 44#endif 45#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ 46 115200} 47 48/* Select serial console configuration */ 49#define CONFIG_CONS_INDEX 3 50#ifdef CONFIG_SPL_BUILD 51#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 52#define CONFIG_SERIAL3 3 53#endif 54 55/* Physical Memory Map */ 56#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 57#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 58 59/* 60 * OMAP3 has 12 GP timers, they can be driven by the system clock 61 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 62 * This rate is divided by a local divisor. 63 */ 64#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 65 66#define CONFIG_SYS_MONITOR_LEN (256 << 10) 67 68/* TWL4030 */ 69#define CONFIG_TWL4030_POWER 70 71/* SPL */ 72#define CONFIG_SPL_TEXT_BASE 0x40200800 73#define CONFIG_SPL_MAX_SIZE (54 * 1024) 74#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 75#define CONFIG_SPL_POWER_SUPPORT 76#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ 77 (64 << 20)) 78 79#ifdef CONFIG_NAND 80#define CONFIG_SPL_NAND_SIMPLE 81#define CONFIG_SYS_NAND_BASE 0x30000000 82#endif 83 84/* Now bring in the rest of the common code. */ 85#include <configs/ti_armv7_omap.h> 86 87#endif /* __CONFIG_TI_OMAP3_COMMON_H__ */ 88