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7#include <common.h>
8#include <netdev.h>
9#include <twl4030.h>
10#include <asm/io.h>
11#include <asm/arch/mmc_host_def.h>
12#include <asm/arch/mem.h>
13#include <asm/arch/mux.h>
14#include <asm/arch/sys_proto.h>
15#include <asm/arch/gpio.h>
16#include <asm/gpio.h>
17#include <asm/mach-types.h>
18
19#include <usb.h>
20#include <asm/ehci-omap.h>
21
22#include "tao3530.h"
23
24DECLARE_GLOBAL_DATA_PTR;
25
26int tao3530_revision(void)
27{
28 int ret = 0;
29
30
31 ret = gpio_request(65, "");
32 if (ret) {
33 puts("Error: GPIO 65 not available\n");
34 goto out;
35 }
36 MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M4));
37
38 ret = gpio_request(1, "");
39 if (ret) {
40 puts("Error: GPIO 1 not available\n");
41 goto out2;
42 }
43 MUX_VAL(CP(SYS_CLKREQ), (IEN | PTU | EN | M4));
44
45 ret = gpio_direction_input(65);
46 if (ret) {
47 puts("Error: GPIO 65 not available for input\n");
48 goto out3;
49 }
50
51 ret = gpio_direction_input(1);
52 if (ret) {
53 puts("Error: GPIO 1 not available for input\n");
54 goto out3;
55 }
56
57 ret = gpio_get_value(65) << 1 | gpio_get_value(1);
58
59out3:
60 MUX_VAL(CP(SYS_CLKREQ), (IEN | PTU | EN | M0));
61 gpio_free(1);
62out2:
63 MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0));
64 gpio_free(65);
65out:
66
67 return ret;
68}
69
70#ifdef CONFIG_SPL_BUILD
71
72
73
74
75
76void get_board_mem_timings(struct board_sdrc_timings *timings)
77{
78#if defined(CONFIG_SYS_BOARD_OMAP3_HA)
79
80
81
82 MUX_OMAP3_HA();
83
84
85 gpio_request(111, "");
86
87 gpio_direction_output(111, 1);
88#endif
89
90 if (tao3530_revision() < 3) {
91
92 timings->mcfg = MCFG(256 << 20, 14);
93 timings->ctrla = HYNIX_V_ACTIMA_165;
94 timings->ctrlb = HYNIX_V_ACTIMB_165;
95 } else {
96
97 timings->mcfg = MCFG(128 << 20, 13);
98 timings->ctrla = MICRON_V_ACTIMA_165;
99 timings->ctrlb = MICRON_V_ACTIMB_165;
100 }
101
102 timings->mr = MICRON_V_MR_165;
103 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
104}
105#endif
106
107
108
109
110
111int board_init(void)
112{
113 gpmc_init();
114
115 gd->bd->bi_arch_number = MACH_TYPE_OMAP3_TAO3530;
116
117 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
118
119 return 0;
120}
121
122
123
124
125
126int misc_init_r(void)
127{
128 struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
129 struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
130
131 twl4030_power_init();
132 twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
133
134
135
136 writel(~(GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
137 writel(~(GPIO31 | GPIO30 | GPIO22 | GPIO21 |
138 GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);
139
140
141 writel(GPIO10 | GPIO8 | GPIO2 | GPIO1,
142 &gpio6_base->setdataout);
143 writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
144 GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);
145
146 switch (tao3530_revision()) {
147 case 0:
148 puts("TAO-3530 REV Reserve 1\n");
149 break;
150 case 1:
151 puts("TAO-3530 REV Reserve 2\n");
152 break;
153 case 2:
154 puts("TAO-3530 REV Cx\n");
155 break;
156 case 3:
157 puts("TAO-3530 REV Ax/Bx\n");
158 break;
159 default:
160 puts("Unknown board revision\n");
161 }
162
163 omap_die_id_display();
164
165 return 0;
166}
167
168
169
170
171
172
173
174void set_muxconf_regs(void)
175{
176 MUX_TAO3530();
177#if defined(CONFIG_SYS_BOARD_OMAP3_HA)
178 MUX_OMAP3_HA();
179#endif
180}
181
182#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
183int board_mmc_init(bd_t *bis)
184{
185 omap_mmc_init(0, 0, 0, -1, -1);
186
187 return 0;
188}
189#endif
190
191#if defined(CONFIG_GENERIC_MMC)
192void board_mmc_power_init(void)
193{
194 twl4030_power_mmc_init(0);
195}
196#endif
197
198#if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD)
199
200void show_boot_progress(int val)
201{
202 if (val == BOOTSTAGE_ID_RUN_OS)
203 usb_stop();
204}
205
206static struct omap_usbhs_board_data usbhs_bdata = {
207 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
208 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
209 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
210};
211
212int ehci_hcd_init(int index, enum usb_init_type init,
213 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
214{
215 return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
216}
217
218int ehci_hcd_stop(int index)
219{
220 return omap_ehci_hcd_stop();
221}
222#endif
223