1/* 2 * Register definitions for the Atmel USART3 module. 3 * 4 * Copyright (C) 2005-2006 Atmel Corporation 5 * 6 * Modified to support C structure SoC access by 7 * Andreas Bießmann <biessmann@corscience.de> 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11#ifndef __DRIVERS_ATMEL_USART_H__ 12#define __DRIVERS_ATMEL_USART_H__ 13 14/* USART3 register footprint */ 15typedef struct atmel_usart3 { 16 u32 cr; 17 u32 mr; 18 u32 ier; 19 u32 idr; 20 u32 imr; 21 u32 csr; 22 u32 rhr; 23 u32 thr; 24 u32 brgr; 25 u32 rtor; 26 u32 ttgr; 27 u32 reserved0[5]; 28 u32 fidi; 29 u32 ner; 30 u32 reserved1; 31 u32 ifr; 32 u32 man; 33 u32 reserved2[54]; /* version and PDC not needed */ 34} atmel_usart3_t; 35 36/* Bitfields in CR */ 37#define USART3_RSTRX_OFFSET 2 38#define USART3_RSTRX_SIZE 1 39#define USART3_RSTTX_OFFSET 3 40#define USART3_RSTTX_SIZE 1 41#define USART3_RXEN_OFFSET 4 42#define USART3_RXEN_SIZE 1 43#define USART3_RXDIS_OFFSET 5 44#define USART3_RXDIS_SIZE 1 45#define USART3_TXEN_OFFSET 6 46#define USART3_TXEN_SIZE 1 47#define USART3_TXDIS_OFFSET 7 48#define USART3_TXDIS_SIZE 1 49#define USART3_RSTSTA_OFFSET 8 50#define USART3_RSTSTA_SIZE 1 51#define USART3_STTBRK_OFFSET 9 52#define USART3_STTBRK_SIZE 1 53#define USART3_STPBRK_OFFSET 10 54#define USART3_STPBRK_SIZE 1 55#define USART3_STTTO_OFFSET 11 56#define USART3_STTTO_SIZE 1 57#define USART3_SENDA_OFFSET 12 58#define USART3_SENDA_SIZE 1 59#define USART3_RSTIT_OFFSET 13 60#define USART3_RSTIT_SIZE 1 61#define USART3_RSTNACK_OFFSET 14 62#define USART3_RSTNACK_SIZE 1 63#define USART3_RETTO_OFFSET 15 64#define USART3_RETTO_SIZE 1 65#define USART3_DTREN_OFFSET 16 66#define USART3_DTREN_SIZE 1 67#define USART3_DTRDIS_OFFSET 17 68#define USART3_DTRDIS_SIZE 1 69#define USART3_RTSEN_OFFSET 18 70#define USART3_RTSEN_SIZE 1 71#define USART3_RTSDIS_OFFSET 19 72#define USART3_RTSDIS_SIZE 1 73#define USART3_COMM_TX_OFFSET 30 74#define USART3_COMM_TX_SIZE 1 75#define USART3_COMM_RX_OFFSET 31 76#define USART3_COMM_RX_SIZE 1 77 78/* Bitfields in MR */ 79#define USART3_USART_MODE_OFFSET 0 80#define USART3_USART_MODE_SIZE 4 81#define USART3_USCLKS_OFFSET 4 82#define USART3_USCLKS_SIZE 2 83#define USART3_CHRL_OFFSET 6 84#define USART3_CHRL_SIZE 2 85#define USART3_SYNC_OFFSET 8 86#define USART3_SYNC_SIZE 1 87#define USART3_PAR_OFFSET 9 88#define USART3_PAR_SIZE 3 89#define USART3_NBSTOP_OFFSET 12 90#define USART3_NBSTOP_SIZE 2 91#define USART3_CHMODE_OFFSET 14 92#define USART3_CHMODE_SIZE 2 93#define USART3_MSBF_OFFSET 16 94#define USART3_MSBF_SIZE 1 95#define USART3_MODE9_OFFSET 17 96#define USART3_MODE9_SIZE 1 97#define USART3_CLKO_OFFSET 18 98#define USART3_CLKO_SIZE 1 99#define USART3_OVER_OFFSET 19 100#define USART3_OVER_SIZE 1 101#define USART3_INACK_OFFSET 20 102#define USART3_INACK_SIZE 1 103#define USART3_DSNACK_OFFSET 21 104#define USART3_DSNACK_SIZE 1 105#define USART3_MAX_ITERATION_OFFSET 24 106#define USART3_MAX_ITERATION_SIZE 3 107#define USART3_FILTER_OFFSET 28 108#define USART3_FILTER_SIZE 1 109 110/* Bitfields in CSR */ 111#define USART3_RXRDY_OFFSET 0 112#define USART3_RXRDY_SIZE 1 113#define USART3_TXRDY_OFFSET 1 114#define USART3_TXRDY_SIZE 1 115#define USART3_RXBRK_OFFSET 2 116#define USART3_RXBRK_SIZE 1 117#define USART3_ENDRX_OFFSET 3 118#define USART3_ENDRX_SIZE 1 119#define USART3_ENDTX_OFFSET 4 120#define USART3_ENDTX_SIZE 1 121#define USART3_OVRE_OFFSET 5 122#define USART3_OVRE_SIZE 1 123#define USART3_FRAME_OFFSET 6 124#define USART3_FRAME_SIZE 1 125#define USART3_PARE_OFFSET 7 126#define USART3_PARE_SIZE 1 127#define USART3_TIMEOUT_OFFSET 8 128#define USART3_TIMEOUT_SIZE 1 129#define USART3_TXEMPTY_OFFSET 9 130#define USART3_TXEMPTY_SIZE 1 131#define USART3_ITERATION_OFFSET 10 132#define USART3_ITERATION_SIZE 1 133#define USART3_TXBUFE_OFFSET 11 134#define USART3_TXBUFE_SIZE 1 135#define USART3_RXBUFF_OFFSET 12 136#define USART3_RXBUFF_SIZE 1 137#define USART3_NACK_OFFSET 13 138#define USART3_NACK_SIZE 1 139#define USART3_RIIC_OFFSET 16 140#define USART3_RIIC_SIZE 1 141#define USART3_DSRIC_OFFSET 17 142#define USART3_DSRIC_SIZE 1 143#define USART3_DCDIC_OFFSET 18 144#define USART3_DCDIC_SIZE 1 145#define USART3_CTSIC_OFFSET 19 146#define USART3_CTSIC_SIZE 1 147#define USART3_RI_OFFSET 20 148#define USART3_RI_SIZE 1 149#define USART3_DSR_OFFSET 21 150#define USART3_DSR_SIZE 1 151#define USART3_DCD_OFFSET 22 152#define USART3_DCD_SIZE 1 153#define USART3_CTS_OFFSET 23 154#define USART3_CTS_SIZE 1 155 156/* Bitfields in RHR */ 157#define USART3_RXCHR_OFFSET 0 158#define USART3_RXCHR_SIZE 9 159 160/* Bitfields in THR */ 161#define USART3_TXCHR_OFFSET 0 162#define USART3_TXCHR_SIZE 9 163 164/* Bitfields in BRGR */ 165#define USART3_CD_OFFSET 0 166#define USART3_CD_SIZE 16 167 168/* Bitfields in RTOR */ 169#define USART3_TO_OFFSET 0 170#define USART3_TO_SIZE 16 171 172/* Bitfields in TTGR */ 173#define USART3_TG_OFFSET 0 174#define USART3_TG_SIZE 8 175 176/* Bitfields in FIDI */ 177#define USART3_FI_DI_RATIO_OFFSET 0 178#define USART3_FI_DI_RATIO_SIZE 11 179 180/* Bitfields in NER */ 181#define USART3_NB_ERRORS_OFFSET 0 182#define USART3_NB_ERRORS_SIZE 8 183 184/* Bitfields in XXR */ 185#define USART3_XOFF_OFFSET 0 186#define USART3_XOFF_SIZE 8 187#define USART3_XON_OFFSET 8 188#define USART3_XON_SIZE 8 189 190/* Bitfields in IFR */ 191#define USART3_IRDA_FILTER_OFFSET 0 192#define USART3_IRDA_FILTER_SIZE 8 193 194/* Bitfields in RCR */ 195#define USART3_RXCTR_OFFSET 0 196#define USART3_RXCTR_SIZE 16 197 198/* Bitfields in TCR */ 199#define USART3_TXCTR_OFFSET 0 200#define USART3_TXCTR_SIZE 16 201 202/* Bitfields in RNCR */ 203#define USART3_RXNCR_OFFSET 0 204#define USART3_RXNCR_SIZE 16 205 206/* Bitfields in TNCR */ 207#define USART3_TXNCR_OFFSET 0 208#define USART3_TXNCR_SIZE 16 209 210/* Bitfields in PTCR */ 211#define USART3_RXTEN_OFFSET 0 212#define USART3_RXTEN_SIZE 1 213#define USART3_RXTDIS_OFFSET 1 214#define USART3_RXTDIS_SIZE 1 215#define USART3_TXTEN_OFFSET 8 216#define USART3_TXTEN_SIZE 1 217#define USART3_TXTDIS_OFFSET 9 218#define USART3_TXTDIS_SIZE 1 219 220/* Constants for USART_MODE */ 221#define USART3_USART_MODE_NORMAL 0 222#define USART3_USART_MODE_RS485 1 223#define USART3_USART_MODE_HARDWARE 2 224#define USART3_USART_MODE_MODEM 3 225#define USART3_USART_MODE_ISO7816_T0 4 226#define USART3_USART_MODE_ISO7816_T1 6 227#define USART3_USART_MODE_IRDA 8 228 229/* Constants for USCLKS */ 230#define USART3_USCLKS_MCK 0 231#define USART3_USCLKS_MCK_DIV 1 232#define USART3_USCLKS_SCK 3 233 234/* Constants for CHRL */ 235#define USART3_CHRL_5 0 236#define USART3_CHRL_6 1 237#define USART3_CHRL_7 2 238#define USART3_CHRL_8 3 239 240/* Constants for PAR */ 241#define USART3_PAR_EVEN 0 242#define USART3_PAR_ODD 1 243#define USART3_PAR_SPACE 2 244#define USART3_PAR_MARK 3 245#define USART3_PAR_NONE 4 246#define USART3_PAR_MULTI 6 247 248/* Constants for NBSTOP */ 249#define USART3_NBSTOP_1 0 250#define USART3_NBSTOP_1_5 1 251#define USART3_NBSTOP_2 2 252 253/* Constants for CHMODE */ 254#define USART3_CHMODE_NORMAL 0 255#define USART3_CHMODE_ECHO 1 256#define USART3_CHMODE_LOCAL_LOOP 2 257#define USART3_CHMODE_REMOTE_LOOP 3 258 259/* Constants for MSBF */ 260#define USART3_MSBF_LSBF 0 261#define USART3_MSBF_MSBF 1 262 263/* Constants for OVER */ 264#define USART3_OVER_X16 0 265#define USART3_OVER_X8 1 266 267/* Constants for CD */ 268#define USART3_CD_DISABLE 0 269#define USART3_CD_BYPASS 1 270 271/* Constants for TO */ 272#define USART3_TO_DISABLE 0 273 274/* Constants for TG */ 275#define USART3_TG_DISABLE 0 276 277/* Constants for FI_DI_RATIO */ 278#define USART3_FI_DI_RATIO_DISABLE 0 279 280/* Bit manipulation macros */ 281#define USART3_BIT(name) \ 282 (1 << USART3_##name##_OFFSET) 283#define USART3_BF(name,value) \ 284 (((value) & ((1 << USART3_##name##_SIZE) - 1)) \ 285 << USART3_##name##_OFFSET) 286#define USART3_BFEXT(name,value) \ 287 (((value) >> USART3_##name##_OFFSET) \ 288 & ((1 << USART3_##name##_SIZE) - 1)) 289#define USART3_BFINS(name,value,old) \ 290 (((old) & ~(((1 << USART3_##name##_SIZE) - 1) \ 291 << USART3_##name##_OFFSET)) \ 292 | USART3_BF(name,value)) 293 294#endif /* __DRIVERS_ATMEL_USART_H__ */ 295