1/* 2 * (C) Copyright 2005-2007 3 * Stefan Roese, DENX Software Engineering, sr@denx.de. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8/************************************************************************ 9 * bamboo.h - configuration for BAMBOO board 10 ***********************************************************************/ 11#ifndef __CONFIG_H 12#define __CONFIG_H 13 14/*----------------------------------------------------------------------- 15 * High Level Configuration Options 16 *----------------------------------------------------------------------*/ 17#define CONFIG_BAMBOO 1 /* Board is BAMBOO */ 18#define CONFIG_440EP 1 /* Specific PPC440EP support */ 19#define CONFIG_440 1 /* ... PPC440 family */ 20#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ 21 22#ifndef CONFIG_SYS_TEXT_BASE 23#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 24#endif 25 26/* 27 * Include common defines/options for all AMCC eval boards 28 */ 29#define CONFIG_HOSTNAME bamboo 30#include "amcc-common.h" 31 32/* Reclaim some space. */ 33#undef CONFIG_SYS_LONGHELP 34 35#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ 36 37/* 38 * Please note that, if NAND support is enabled, the 2nd ethernet port 39 * can't be used because of pin multiplexing. So, if you want to use the 40 * 2nd ethernet port you have to "undef" the following define. 41 */ 42#define CONFIG_BAMBOO_NAND 1 /* enable nand flash support */ 43 44/*----------------------------------------------------------------------- 45 * Base addresses -- Note these are effective addresses where the 46 * actual resources get mapped (not physical addresses) 47 *----------------------------------------------------------------------*/ 48#define CONFIG_SYS_FLASH_BASE 0xfff00000 /* start of FLASH */ 49#define CONFIG_SYS_PCI_MEMBASE 0xa0000000 /* mapped pci memory*/ 50#define CONFIG_SYS_PCI_MEMBASE1 CONFIG_SYS_PCI_MEMBASE + 0x10000000 51#define CONFIG_SYS_PCI_MEMBASE2 CONFIG_SYS_PCI_MEMBASE1 + 0x10000000 52#define CONFIG_SYS_PCI_MEMBASE3 CONFIG_SYS_PCI_MEMBASE2 + 0x10000000 53 54/*Don't change either of these*/ 55#define CONFIG_SYS_PCI_BASE 0xe0000000 /* internal PCI regs*/ 56/*Don't change either of these*/ 57 58#define CONFIG_SYS_USB_DEVICE 0x50000000 59#define CONFIG_SYS_NVRAM_BASE_ADDR 0x80000000 60#define CONFIG_SYS_BOOT_BASE_ADDR 0xf0000000 61#define CONFIG_SYS_NAND_ADDR 0x90000000 62#define CONFIG_SYS_NAND2_ADDR 0x94000000 63 64/*----------------------------------------------------------------------- 65 * Initial RAM & stack pointer (placed in SDRAM) 66 *----------------------------------------------------------------------*/ 67#define CONFIG_SYS_INIT_RAM_DCACHE 1 /* d-cache as init ram */ 68#define CONFIG_SYS_INIT_RAM_ADDR 0x70000000 /* DCache */ 69#define CONFIG_SYS_INIT_RAM_SIZE (4 << 10) 70#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 71#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 72 73/*----------------------------------------------------------------------- 74 * Serial Port 75 *----------------------------------------------------------------------*/ 76#define CONFIG_CONS_INDEX 1 /* Use UART0 */ 77#define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* use external 11.059MHz clk */ 78 79/*----------------------------------------------------------------------- 80 * NVRAM/RTC 81 * 82 * NOTE: The RTC registers are located at 0x7FFF0 - 0x7FFFF 83 * The DS1558 code assumes this condition 84 * 85 *----------------------------------------------------------------------*/ 86#define CONFIG_SYS_NVRAM_SIZE (0x2000 - 0x10) /* NVRAM size(8k)- RTC regs */ 87#define CONFIG_RTC_DS1556 1 /* DS1556 RTC */ 88 89/*----------------------------------------------------------------------- 90 * Environment 91 *----------------------------------------------------------------------*/ 92#define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */ 93 94/*----------------------------------------------------------------------- 95 * FLASH related 96 *----------------------------------------------------------------------*/ 97#define CONFIG_SYS_MAX_FLASH_BANKS 3 /* number of banks */ 98#define CONFIG_SYS_MAX_FLASH_SECT 256 /* sectors per device */ 99 100#undef CONFIG_SYS_FLASH_CHECKSUM 101#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ 102#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ 103 104#define CONFIG_SYS_FLASH_ADDR0 0x555 105#define CONFIG_SYS_FLASH_ADDR1 0x2aa 106#define CONFIG_SYS_FLASH_WORD_SIZE unsigned char 107 108#define CONFIG_SYS_FLASH_2ND_16BIT_DEV 1 /* bamboo has 8 and 16bit device */ 109#define CONFIG_SYS_FLASH_2ND_ADDR 0x87800000 /* bamboo has 8 and 16bit device */ 110 111#ifdef CONFIG_ENV_IS_IN_FLASH 112#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ 113#define CONFIG_ENV_ADDR ((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE) 114#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ 115 116/* Address and size of Redundant Environment Sector */ 117#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE) 118#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) 119#endif /* CONFIG_ENV_IS_IN_FLASH */ 120 121/*----------------------------------------------------------------------- 122 * NAND FLASH 123 *----------------------------------------------------------------------*/ 124#define CONFIG_SYS_MAX_NAND_DEVICE 2 125#define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS) 126#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_ADDR + 2 } 127#define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */ 128#define CONFIG_SYS_NAND_CS 1 129 130/*----------------------------------------------------------------------- 131 * DDR SDRAM 132 *----------------------------------------------------------------------------- */ 133#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */ 134#undef CONFIG_DDR_ECC /* don't use ECC */ 135#define CONFIG_SYS_SIMULATE_SPD_EEPROM 0xff /* simulate spd eeprom on this address */ 136#define SPD_EEPROM_ADDRESS {CONFIG_SYS_SIMULATE_SPD_EEPROM, 0x50, 0x51} 137#define CONFIG_SYS_MBYTES_SDRAM (64) /* 64MB fixed size for early-sdram-init */ 138#define CONFIG_PROG_SDRAM_TLB 139 140/*----------------------------------------------------------------------- 141 * I2C 142 *----------------------------------------------------------------------*/ 143#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 144 145#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) 146#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 147#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 148#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 149 150#ifdef CONFIG_ENV_IS_IN_EEPROM 151#define CONFIG_ENV_SIZE 0x200 /* Size of Environment vars */ 152#define CONFIG_ENV_OFFSET 0x0 153#endif /* CONFIG_ENV_IS_IN_EEPROM */ 154 155/* 156 * Default environment variables 157 */ 158#define CONFIG_EXTRA_ENV_SETTINGS \ 159 CONFIG_AMCC_DEF_ENV \ 160 CONFIG_AMCC_DEF_ENV_POWERPC \ 161 CONFIG_AMCC_DEF_ENV_PPC_OLD \ 162 CONFIG_AMCC_DEF_ENV_NOR_UPD \ 163 "kernel_addr=fff00000\0" \ 164 "ramdisk_addr=fff10000\0" \ 165 "" 166 167#define CONFIG_HAS_ETH0 168#define CONFIG_PHY_ADDR 0 /* PHY address, See schematics */ 169#define CONFIG_PHY1_ADDR 1 170 171#ifndef CONFIG_BAMBOO_NAND 172#define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */ 173#endif /* CONFIG_BAMBOO_NAND */ 174 175#ifdef CONFIG_440EP 176/* USB */ 177#define CONFIG_USB_OHCI 178 179/*Comment this out to enable USB 1.1 device*/ 180#define USB_2_0_DEVICE 181#endif /*CONFIG_440EP*/ 182 183/* 184 * Commands additional to the ones defined in amcc-common.h 185 */ 186#define CONFIG_CMD_DATE 187#define CONFIG_CMD_PCI 188#define CONFIG_CMD_SDRAM 189 190#ifdef CONFIG_BAMBOO_NAND 191#define CONFIG_CMD_NAND 192#endif 193 194#define CONFIG_SUPPORT_VFAT 195 196/* Partitions */ 197#define CONFIG_MAC_PARTITION 198#define CONFIG_DOS_PARTITION 199#define CONFIG_ISO_PARTITION 200 201/*----------------------------------------------------------------------- 202 * PCI stuff 203 *----------------------------------------------------------------------- 204 */ 205/* General PCI */ 206#define CONFIG_PCI /* include pci support */ 207#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ 208#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */ 209#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ 210#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE*/ 211 212/* Board-specific PCI */ 213#define CONFIG_SYS_PCI_TARGET_INIT 214#define CONFIG_SYS_PCI_MASTER_INIT 215 216#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */ 217#define CONFIG_SYS_PCI_SUBSYS_ID 0xcafe /* Whatever */ 218 219#endif /* __CONFIG_H */ 220