1
2
3
4
5
6
7
8
9
10#ifndef __TAM3517_H
11#define __TAM3517_H
12
13
14
15
16#define CONFIG_OMAP
17#define CONFIG_OMAP_GPIO
18#define CONFIG_OMAP_COMMON
19
20#define CONFIG_ARM_ERRATA_454179
21#define CONFIG_ARM_ERRATA_430973
22#define CONFIG_ARM_ERRATA_621766
23
24#define CONFIG_SYS_TEXT_BASE 0x80008000
25
26#define CONFIG_EMIF4
27
28#include <asm/arch/cpu.h>
29#include <asm/arch/omap.h>
30
31
32
33
34#define CONFIG_DISPLAY_CPUINFO
35#define CONFIG_DISPLAY_BOARDINFO
36
37
38#define V_OSCK 26000000
39#define V_SCLK (V_OSCK >> 1)
40
41#define CONFIG_MISC_INIT_R
42
43#define CONFIG_CMDLINE_TAG
44#define CONFIG_SETUP_MEMORY_TAGS
45#define CONFIG_INITRD_TAG
46#define CONFIG_REVISION_TAG
47
48
49
50
51#define CONFIG_ENV_SIZE (128 << 10)
52#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \
53 2 * 1024 * 1024)
54
55
56
57#define CONFIG_OMAP3_MICRON_DDR
58#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
59
60
61
62
63
64
65
66
67#define CONFIG_SYS_NS16550_SERIAL
68#define CONFIG_SYS_NS16550_REG_SIZE (-4)
69#define CONFIG_SYS_NS16550_CLK 48000000
70
71
72
73
74#define CONFIG_CONS_INDEX 1
75#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
76#define CONFIG_SERIAL1
77
78
79#define CONFIG_ENV_OVERWRITE
80#define CONFIG_BAUDRATE 115200
81#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
82 115200}
83#define CONFIG_MMC
84#define CONFIG_OMAP_HSMMC
85#define CONFIG_GENERIC_MMC
86#define CONFIG_DOS_PARTITION
87
88
89#define CONFIG_OMAP3_GPIO_5
90#define CONFIG_USB_EHCI
91#define CONFIG_USB_EHCI_OMAP
92#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
93#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
94
95
96#define CONFIG_CMD_NAND
97#define CONFIG_CMD_EEPROM
98
99#define CONFIG_SYS_NO_FLASH
100#define CONFIG_SYS_I2C
101#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
102#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
103#define CONFIG_SYS_I2C_OMAP34XX
104#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
105#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
106#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
107
108
109
110
111#define CONFIG_SYS_NAND_BASE NAND_BASE
112
113
114
115#define CONFIG_SYS_MAX_NAND_DEVICE 1
116
117
118#define CONFIG_AUTO_COMPLETE
119
120
121
122
123#define CONFIG_SYS_LONGHELP
124#define CONFIG_CMDLINE_EDITING
125#define CONFIG_AUTO_COMPLETE
126#define CONFIG_SYS_CBSIZE 512
127
128
129#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
130 sizeof(CONFIG_SYS_PROMPT) + 16)
131#define CONFIG_SYS_MAXARGS 32
132
133
134#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
135
136#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
137#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
138 0x01F00000)
139
140#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
141
142
143
144
145
146
147
148#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
149#define CONFIG_SYS_PTV 2
150
151
152
153
154#define CONFIG_NR_DRAM_BANKS 2
155#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
156#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
157
158
159
160
161
162
163#define CONFIG_NAND
164#define CONFIG_NAND_OMAP_GPMC
165#define CONFIG_ENV_IS_IN_NAND
166#define SMNAND_ENV_OFFSET 0x180000
167
168
169#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10)
170#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
171#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
172#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
173 2 * CONFIG_SYS_ENV_SECT_SIZE)
174#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
175
176#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
177#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
178#define CONFIG_SYS_INIT_RAM_SIZE 0x800
179#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
180 CONFIG_SYS_INIT_RAM_SIZE - \
181 GENERATED_GBL_DATA_SIZE)
182
183
184
185
186
187#define CONFIG_DRIVER_TI_EMAC
188#define CONFIG_DRIVER_TI_EMAC_USE_RMII
189#define CONFIG_MII
190#define CONFIG_EMAC_MDIO_PHY_NUM 0
191#define CONFIG_BOOTP_DNS
192#define CONFIG_BOOTP_DNS2
193#define CONFIG_BOOTP_SEND_HOSTNAME
194#define CONFIG_NET_RETRY_COUNT 10
195
196
197#define CONFIG_SPL_FRAMEWORK
198#define CONFIG_SPL_BOARD_INIT
199#define CONFIG_SPL_CONSOLE
200#define CONFIG_SPL_NAND_SIMPLE
201#define CONFIG_SPL_NAND_SOFTECC
202#define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000
203
204#define CONFIG_SPL_LIBCOMMON_SUPPORT
205#define CONFIG_SPL_LIBDISK_SUPPORT
206#define CONFIG_SPL_I2C_SUPPORT
207#define CONFIG_SPL_MMC_SUPPORT
208#define CONFIG_SPL_FAT_SUPPORT
209#define CONFIG_SPL_LIBGENERIC_SUPPORT
210#define CONFIG_SPL_SERIAL_SUPPORT
211#define CONFIG_SPL_GPIO_SUPPORT
212#define CONFIG_SPL_POWER_SUPPORT
213#define CONFIG_SPL_NAND_SUPPORT
214#define CONFIG_SPL_NAND_BASE
215#define CONFIG_SPL_NAND_DRIVERS
216#define CONFIG_SPL_NAND_ECC
217#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
218
219#define CONFIG_SPL_TEXT_BASE 0x40200000
220#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
221 CONFIG_SPL_TEXT_BASE)
222#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
223
224#define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
225#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
226#define CONFIG_SPL_BSS_START_ADDR 0x8f080000
227#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
228
229#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
230#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
231#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
232
233
234#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
235#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
236
237
238#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900
239#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80
240#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80
241
242
243#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
244#define CONFIG_SYS_NAND_PAGE_COUNT 64
245#define CONFIG_SYS_NAND_PAGE_SIZE 2048
246#define CONFIG_SYS_NAND_OOBSIZE 64
247#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
248#define CONFIG_SYS_NAND_5_ADDR_CYCLE
249#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
250#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
251 48, 49, 50, 51, 52, 53, 54, 55,\
252 56, 57, 58, 59, 60, 61, 62, 63}
253#define CONFIG_SYS_NAND_ECCSIZE 256
254#define CONFIG_SYS_NAND_ECCBYTES 3
255#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
256#define CONFIG_NAND_OMAP_GPMC_PREFETCH
257
258#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
259
260#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
261#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
262
263#define CONFIG_CMD_UBI
264#define CONFIG_CMD_UBIFS
265#define CONFIG_RBTREE
266#define CONFIG_LZO
267#define CONFIG_MTD_PARTITIONS
268#define CONFIG_MTD_DEVICE
269#define CONFIG_CMD_MTDPARTS
270
271
272#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
273#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
274 "1m(u-boot),256k(env1)," \
275 "256k(env2),6m(kernel),-(rootfs)"
276
277#define CONFIG_TAM3517_SETTINGS \
278 "netdev=eth0\0" \
279 "nandargs=setenv bootargs root=${nandroot} " \
280 "rootfstype=${nandrootfstype}\0" \
281 "nfsargs=setenv bootargs root=/dev/nfs rw " \
282 "nfsroot=${serverip}:${rootpath}\0" \
283 "ramargs=setenv bootargs root=/dev/ram rw\0" \
284 "addip_sta=setenv bootargs ${bootargs} " \
285 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
286 ":${hostname}:${netdev}:off panic=1\0" \
287 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
288 "addip=if test -n ${ipdyn};then run addip_dyn;" \
289 "else run addip_sta;fi\0" \
290 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
291 "addtty=setenv bootargs ${bootargs}" \
292 " console=ttyO0,${baudrate}\0" \
293 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
294 "loadaddr=82000000\0" \
295 "kernel_addr_r=82000000\0" \
296 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
297 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
298 "flash_self=run ramargs addip addtty addmtd addmisc;" \
299 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
300 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
301 "bootm ${kernel_addr}\0" \
302 "nandboot=run nandargs addip addtty addmtd addmisc;" \
303 "nand read ${kernel_addr_r} kernel\0" \
304 "bootm ${kernel_addr_r}\0" \
305 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
306 "run nfsargs addip addtty addmtd addmisc;" \
307 "bootm ${kernel_addr_r}\0" \
308 "net_self=if run net_self_load;then " \
309 "run ramargs addip addtty addmtd addmisc;" \
310 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
311 "else echo Images not loades;fi\0" \
312 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \
313 "load=tftp ${loadaddr} ${u-boot}\0" \
314 "loadmlo=tftp ${loadaddr} ${mlo}\0" \
315 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \
316 "uboot_addr=0x80000\0" \
317 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
318 "nand write ${loadaddr} ${uboot_addr} 80000\0" \
319 "updatemlo=nandecc hw;nand erase 0 20000;" \
320 "nand write ${loadaddr} 0 20000\0" \
321 "upd=if run load;then echo Updating u-boot;if run update;" \
322 "then echo U-Boot updated;" \
323 "else echo Error updating u-boot !;" \
324 "echo Board without bootloader !!;" \
325 "fi;" \
326 "else echo U-Boot not downloaded..exiting;fi\0" \
327
328
329
330
331
332
333#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
334
335
336
337
338struct tam3517_module_info {
339 char customer[48];
340 char product[48];
341
342
343
344
345
346
347 unsigned long long sequence_number;
348
349
350
351
352
353
354 unsigned int revision;
355 unsigned char eth_addr[4][8];
356 unsigned char _rev[100];
357};
358
359#define TAM3517_READ_EEPROM(info, ret) \
360do { \
361 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \
362 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
363 (void *)info, sizeof(*info))) \
364 ret = 1; \
365 else \
366 ret = 0; \
367} while (0)
368
369#define TAM3517_READ_MAC_FROM_EEPROM(info) \
370do { \
371 char buf[80], ethname[20]; \
372 int i; \
373 memset(buf, 0, sizeof(buf)); \
374 for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \
375 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \
376 (info)->eth_addr[i][5], \
377 (info)->eth_addr[i][4], \
378 (info)->eth_addr[i][3], \
379 (info)->eth_addr[i][2], \
380 (info)->eth_addr[i][1], \
381 (info)->eth_addr[i][0]); \
382 \
383 if (i) \
384 sprintf(ethname, "eth%daddr", i); \
385 else \
386 strcpy(ethname, "ethaddr"); \
387 printf("Setting %s from EEPROM with %s\n", ethname, buf);\
388 setenv(ethname, buf); \
389 } \
390} while (0)
391
392
393#define TAM3517_sequence_number(info) \
394 ((info)->sequence_number % 0x1000000000000LL)
395#define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100)
396#define TAM3517_year(info) ((info)->sequence_number >> 56)
397#define TAM3517_revision_fixed(info) ((info)->revision % 0x100)
398#define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100)
399#define TAM3517_revision_tn(info) ((info)->revision >> 16)
400
401#define TAM3517_PRINT_SOM_INFO(info) \
402do { \
403 printf("Vendor:%s\n", (info)->customer); \
404 printf("SOM: %s\n", (info)->product); \
405 printf("SeqNr: %02llu%02llu%012llu\n", \
406 TAM3517_year(info), \
407 TAM3517_week_of_year(info), \
408 TAM3517_sequence_number(info)); \
409 printf("Rev: TN%u %u.%u\n", \
410 TAM3517_revision_tn(info), \
411 TAM3517_revision_major(info), \
412 TAM3517_revision_fixed(info)); \
413} while (0)
414
415#endif
416
417#endif
418