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7#ifndef _CPU_ASM_H
8#define _CPU_ASM_H
9
10#define BIT_C 0x00000001
11
12#define OP_BLR 0x4e800020
13#define OP_EXTSB 0x7c000774
14#define OP_EXTSH 0x7c000734
15#define OP_NEG 0x7c0000d0
16#define OP_CNTLZW 0x7c000034
17#define OP_ADD 0x7c000214
18#define OP_ADDC 0x7c000014
19#define OP_ADDME 0x7c0001d4
20#define OP_ADDZE 0x7c000194
21#define OP_ADDE 0x7c000114
22#define OP_ADDI 0x38000000
23#define OP_SUBF 0x7c000050
24#define OP_SUBFC 0x7c000010
25#define OP_SUBFE 0x7c000110
26#define OP_SUBFME 0x7c0001d0
27#define OP_SUBFZE 0x7c000190
28#define OP_MFCR 0x7c000026
29#define OP_MTCR 0x7c0ff120
30#define OP_MFXER 0x7c0102a6
31#define OP_MTXER 0x7c0103a6
32#define OP_MCRXR 0x7c000400
33#define OP_MCRF 0x4c000000
34#define OP_CRAND 0x4c000202
35#define OP_CRANDC 0x4c000102
36#define OP_CROR 0x4c000382
37#define OP_CRORC 0x4c000342
38#define OP_CRXOR 0x4c000182
39#define OP_CRNAND 0x4c0001c2
40#define OP_CRNOR 0x4c000042
41#define OP_CREQV 0x4c000242
42#define OP_CMPW 0x7c000000
43#define OP_CMPLW 0x7c000040
44#define OP_CMPWI 0x2c000000
45#define OP_CMPLWI 0x28000000
46#define OP_MULLW 0x7c0001d6
47#define OP_MULHW 0x7c000096
48#define OP_MULHWU 0x7c000016
49#define OP_DIVW 0x7c0003d6
50#define OP_DIVWU 0x7c000396
51#define OP_OR 0x7c000378
52#define OP_ORC 0x7c000338
53#define OP_XOR 0x7c000278
54#define OP_NAND 0x7c0003b8
55#define OP_NOR 0x7c0000f8
56#define OP_EQV 0x7c000238
57#define OP_SLW 0x7c000030
58#define OP_SRW 0x7c000430
59#define OP_SRAW 0x7c000630
60#define OP_ORI 0x60000000
61#define OP_ORIS 0x64000000
62#define OP_XORI 0x68000000
63#define OP_XORIS 0x6c000000
64#define OP_ANDI_ 0x70000000
65#define OP_ANDIS_ 0x74000000
66#define OP_SRAWI 0x7c000670
67#define OP_RLWINM 0x54000000
68#define OP_RLWNM 0x5c000000
69#define OP_RLWIMI 0x50000000
70#define OP_LWZ 0x80000000
71#define OP_LHZ 0xa0000000
72#define OP_LHA 0xa8000000
73#define OP_LBZ 0x88000000
74#define OP_LWZU 0x84000000
75#define OP_LHZU 0xa4000000
76#define OP_LHAU 0xac000000
77#define OP_LBZU 0x8c000000
78#define OP_LWZX 0x7c00002e
79#define OP_LHZX 0x7c00022e
80#define OP_LHAX 0x7c0002ae
81#define OP_LBZX 0x7c0000ae
82#define OP_LWZUX 0x7c00006e
83#define OP_LHZUX 0x7c00026e
84#define OP_LHAUX 0x7c0002ee
85#define OP_LBZUX 0x7c0000ee
86#define OP_STW 0x90000000
87#define OP_STH 0xb0000000
88#define OP_STB 0x98000000
89#define OP_STWU 0x94000000
90#define OP_STHU 0xb4000000
91#define OP_STBU 0x9c000000
92#define OP_STWX 0x7c00012e
93#define OP_STHX 0x7c00032e
94#define OP_STBX 0x7c0001ae
95#define OP_STWUX 0x7c00016e
96#define OP_STHUX 0x7c00036e
97#define OP_STBUX 0x7c0001ee
98#define OP_B 0x48000000
99#define OP_BL 0x48000001
100#define OP_BC 0x40000000
101#define OP_BCL 0x40000001
102#define OP_MTLR 0x7c0803a6
103#define OP_MFLR 0x7c0802a6
104#define OP_MTCTR 0x7c0903a6
105#define OP_MFCTR 0x7c0902a6
106#define OP_LMW 0xb8000000
107#define OP_STMW 0xbc000000
108#define OP_LSWI 0x7c0004aa
109#define OP_LSWX 0x7c00042a
110#define OP_STSWI 0x7c0005aa
111#define OP_STSWX 0x7c00052a
112
113#define ASM_0(opcode) (opcode)
114#define ASM_1(opcode, rd) ((opcode) + \
115 ((rd) << 21))
116#define ASM_1C(opcode, cr) ((opcode) + \
117 ((cr) << 23))
118#define ASM_11(opcode, rd, rs) ((opcode) + \
119 ((rd) << 21) + \
120 ((rs) << 16))
121#define ASM_11C(opcode, cd, cs) ((opcode) + \
122 ((cd) << 23) + \
123 ((cs) << 18))
124#define ASM_11X(opcode, rd, rs) ((opcode) + \
125 ((rs) << 21) + \
126 ((rd) << 16))
127#define ASM_11I(opcode, rd, rs, simm) ((opcode) + \
128 ((rd) << 21) + \
129 ((rs) << 16) + \
130 ((simm) & 0xffff))
131#define ASM_11IF(opcode, rd, rs, simm) ((opcode) + \
132 ((rd) << 21) + \
133 ((rs) << 16) + \
134 ((simm) << 11))
135#define ASM_11S(opcode, rd, rs, sh) ((opcode) + \
136 ((rs) << 21) + \
137 ((rd) << 16) + \
138 ((sh) << 11))
139#define ASM_11IX(opcode, rd, rs, imm) ((opcode) + \
140 ((rs) << 21) + \
141 ((rd) << 16) + \
142 ((imm) & 0xffff))
143#define ASM_12(opcode, rd, rs1, rs2) ((opcode) + \
144 ((rd) << 21) + \
145 ((rs1) << 16) + \
146 ((rs2) << 11))
147#define ASM_12F(opcode, fd, fs1, fs2) ((opcode) + \
148 ((fd) << 21) + \
149 ((fs1) << 16) + \
150 ((fs2) << 11))
151#define ASM_12X(opcode, rd, rs1, rs2) ((opcode) + \
152 ((rs1) << 21) + \
153 ((rd) << 16) + \
154 ((rs2) << 11))
155#define ASM_2C(opcode, cr, rs1, rs2) ((opcode) + \
156 ((cr) << 23) + \
157 ((rs1) << 16) + \
158 ((rs2) << 11))
159#define ASM_1IC(opcode, cr, rs, imm) ((opcode) + \
160 ((cr) << 23) + \
161 ((rs) << 16) + \
162 ((imm) & 0xffff))
163#define ASM_122(opcode, rd, rs1, rs2, imm1, imm2) \
164 ((opcode) + \
165 ((rs1) << 21) + \
166 ((rd) << 16) + \
167 ((rs2) << 11) + \
168 ((imm1) << 6) + \
169 ((imm2) << 1))
170#define ASM_113(opcode, rd, rs, imm1, imm2, imm3) \
171 ((opcode) + \
172 ((rs) << 21) + \
173 ((rd) << 16) + \
174 ((imm1) << 11) + \
175 ((imm2) << 6) + \
176 ((imm3) << 1))
177#define ASM_1O(opcode, off) ((opcode) + (off))
178#define ASM_3O(opcode, bo, bi, off) ((opcode) + \
179 ((bo) << 21) + \
180 ((bi) << 16) + \
181 (off))
182
183#define ASM_ADDI(rd, rs, simm) ASM_11I(OP_ADDI, rd, rs, simm)
184#define ASM_BLR ASM_0(OP_BLR)
185#define ASM_STW(rd, rs, simm) ASM_11I(OP_STW, rd, rs, simm)
186#define ASM_LWZ(rd, rs, simm) ASM_11I(OP_LWZ, rd, rs, simm)
187#define ASM_MFCR(rd) ASM_1(OP_MFCR, rd)
188#define ASM_MTCR(rd) ASM_1(OP_MTCR, rd)
189#define ASM_MFXER(rd) ASM_1(OP_MFXER, rd)
190#define ASM_MTXER(rd) ASM_1(OP_MTXER, rd)
191#define ASM_MFCTR(rd) ASM_1(OP_MFCTR, rd)
192#define ASM_MTCTR(rd) ASM_1(OP_MTCTR, rd)
193#define ASM_MCRXR(cr) ASM_1C(OP_MCRXR, cr)
194#define ASM_MCRF(cd, cs) ASM_11C(OP_MCRF, cd, cs)
195#define ASM_B(off) ASM_1O(OP_B, off)
196#define ASM_BL(off) ASM_1O(OP_BL, off)
197#define ASM_MFLR(rd) ASM_1(OP_MFLR, rd)
198#define ASM_MTLR(rd) ASM_1(OP_MTLR, rd)
199#define ASM_LI(rd, imm) ASM_ADDI(rd, 0, imm)
200#define ASM_LMW(rd, rs, simm) ASM_11I(OP_LMW, rd, rs, simm)
201#define ASM_STMW(rd, rs, simm) ASM_11I(OP_STMW, rd, rs, simm)
202#define ASM_LSWI(rd, rs, simm) ASM_11IF(OP_LSWI, rd, rs, simm)
203#define ASM_LSWX(rd, rs1, rs2) ASM_12(OP_LSWX, rd, rs1, rs2)
204#define ASM_STSWI(rd, rs, simm) ASM_11IF(OP_STSWI, rd, rs, simm)
205#define ASM_STSWX(rd, rs1, rs2) ASM_12(OP_STSWX, rd, rs1, rs2)
206
207
208#endif
209
