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6
7#include <common.h>
8#include <clk.h>
9#include <dm.h>
10#include <ram.h>
11#include <asm/io.h>
12#include <asm/arch/clock.h>
13#include <asm/arch/periph.h>
14#include <asm/gpio.h>
15#include <dm/pinctrl.h>
16
17DECLARE_GLOBAL_DATA_PTR;
18
19int board_init(void)
20{
21#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
22 struct udevice *pinctrl;
23 int ret;
24
25
26
27
28
29
30 ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
31 if (ret) {
32 debug("%s: Cannot find pinctrl device\n", __func__);
33 goto err;
34 }
35 ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
36 if (ret) {
37 debug("%s: Failed to set up SD card\n", __func__);
38 goto err;
39 }
40
41 return 0;
42err:
43 printf("board_init: Error %d\n", ret);
44
45
46 hang();
47
48 return -1;
49#else
50 return 0;
51#endif
52}
53
54int dram_init(void)
55{
56 struct ram_info ram;
57 struct udevice *dev;
58 int ret;
59
60 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
61 if (ret) {
62 debug("DRAM init failed: %d\n", ret);
63 return ret;
64 }
65 ret = ram_get_info(dev, &ram);
66 if (ret) {
67 debug("Cannot get DRAM size: %d\n", ret);
68 return ret;
69 }
70 debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size);
71 gd->ram_size = ram.size;
72
73 return 0;
74}
75
76#ifndef CONFIG_SYS_DCACHE_OFF
77void enable_caches(void)
78{
79
80 dcache_enable();
81}
82#endif
83
84void lowlevel_init(void)
85{
86}
87
88#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
89#include <usb.h>
90#include <usb/dwc2_udc.h>
91
92static struct dwc2_plat_otg_data rk3288_otg_data = {
93 .rx_fifo_sz = 512,
94 .np_tx_fifo_sz = 16,
95 .tx_fifo_sz = 128,
96};
97
98int board_usb_init(int index, enum usb_init_type init)
99{
100 int node, phy_node;
101 const char *mode;
102 bool matched = false;
103 const void *blob = gd->fdt_blob;
104 u32 grf_phy_offset;
105
106
107 node = fdt_node_offset_by_compatible(blob, -1,
108 "rockchip,rk3288-usb");
109
110 while (node > 0) {
111 mode = fdt_getprop(blob, node, "dr_mode", NULL);
112 if (mode && strcmp(mode, "otg") == 0) {
113 matched = true;
114 break;
115 }
116
117 node = fdt_node_offset_by_compatible(blob, node,
118 "rockchip,rk3288-usb");
119 }
120 if (!matched) {
121 debug("Not found usb_otg device\n");
122 return -ENODEV;
123 }
124 rk3288_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
125
126 node = fdtdec_lookup_phandle(blob, node, "phys");
127 if (node <= 0) {
128 debug("Not found usb phy device\n");
129 return -ENODEV;
130 }
131
132 phy_node = fdt_parent_offset(blob, node);
133 if (phy_node <= 0) {
134 debug("Not found usb phy device\n");
135 return -ENODEV;
136 }
137
138 rk3288_otg_data.phy_of_node = phy_node;
139 grf_phy_offset = fdtdec_get_addr(blob, node, "reg");
140
141
142 node = fdt_node_offset_by_compatible(blob, -1,
143 "rockchip,rk3288-grf");
144 if (node <= 0) {
145 debug("Not found grf device\n");
146 return -ENODEV;
147 }
148 rk3288_otg_data.regs_phy = grf_phy_offset +
149 fdtdec_get_addr(blob, node, "reg");
150
151 return dwc2_udc_probe(&rk3288_otg_data);
152}
153
154int board_usb_cleanup(int index, enum usb_init_type init)
155{
156 return 0;
157}
158#endif
159
160static int do_clock(cmd_tbl_t *cmdtp, int flag, int argc,
161 char * const argv[])
162{
163 static const struct {
164 char *name;
165 int id;
166 } clks[] = {
167 { "osc", CLK_OSC },
168 { "apll", CLK_ARM },
169 { "dpll", CLK_DDR },
170 { "cpll", CLK_CODEC },
171 { "gpll", CLK_GENERAL },
172#ifdef CONFIG_ROCKCHIP_RK3036
173 { "mpll", CLK_NEW },
174#else
175 { "npll", CLK_NEW },
176#endif
177 };
178 int ret, i;
179 struct udevice *dev;
180
181 ret = rockchip_get_clk(&dev);
182 if (ret) {
183 printf("clk-uclass not found\n");
184 return 0;
185 }
186
187 for (i = 0; i < ARRAY_SIZE(clks); i++) {
188 struct clk clk;
189 ulong rate;
190
191 clk.id = clks[i].id;
192 ret = clk_request(dev, &clk);
193 if (ret < 0)
194 continue;
195
196 rate = clk_get_rate(&clk);
197 printf("%s: %lu\n", clks[i].name, rate);
198
199 clk_free(&clk);
200 }
201
202 return 0;
203}
204
205U_BOOT_CMD(
206 clock, 2, 1, do_clock,
207 "display information about clocks",
208 ""
209);
210