LXR uboot/arch/powerpc/cpu/mpc512x/ide.c

   1/*
   2 * (C) Copyright 2007-2009 DENX Software Engineering
   3 *
   4 * SPDX-License-Identifier:     GPL-2.0+
   5 */
   6
   7#include <common.h>
   8#include <command.h>
   9#include <asm/io.h>
  10#include <asm/processor.h>
  11
  12DECLARE_GLOBAL_DATA_PTR;
  13
  14#if defined(CONFIG_IDE_RESET)
  15
  16void ide_set_reset (int idereset)
  17{
  18        volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  19        debug ("ide_set_reset(%d)\n", idereset);
  20
  21        if (idereset) {
  22                out_be32(&im->pata.pata_ata_control, 0);
  23        } else {
  24                out_be32(&im->pata.pata_ata_control, FSL_ATA_CTRL_ATA_RST_B);
  25        }
  26        udelay(100);
  27}
  28
  29void init_ide_reset (void)
  30{
  31        debug ("init_ide_reset\n");
  32
  33        /*
  34         * Clear the reset bit to reset the interface
  35         * cf. RefMan MPC5121EE: 28.4.1 Resetting the ATA Bus
  36         */
  37        ide_set_reset(1);
  38
  39        /* Assert the reset bit to enable the interface */
  40        ide_set_reset(0);
  41
  42}
  43
  44#define CALC_TIMING(t) (t + period - 1) / period
  45
  46int ide_preinit (void)
  47{
  48        volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  49        long t;
  50        const struct {
  51                short t0;
  52                short t1;
  53                short t2_8;
  54                short t2_16;
  55                short t2i;
  56                short t4;
  57                short t9;
  58                short tA;
  59        } pio_specs = {
  60                .t0    = 600,
  61                .t1    =  70,
  62                .t2_8  = 290,
  63                .t2_16 = 165,
  64                .t2i   =   0,
  65                .t4    =  30,
  66                .t9    =  20,
  67                .tA    =  50,
  68        };
  69        union {
  70                u32 config;
  71                struct {
  72                        u8 field1;
  73                        u8 field2;
  74                        u8 field3;
  75                        u8 field4;
  76                }bytes;
  77        } cfg;
  78
  79        debug ("IDE preinit using PATA peripheral at IMMR-ADDR %08x\n",
  80                (u32)&im->pata);
  81
  82        /* Set the reset bit to 1 to enable the interface */
  83        ide_set_reset(0);
  84
  85        /* Init timings : we use PIO mode 0 timings */
  86        t = 1000000000 / gd->arch.ips_clk;      /* period in ns */
  87        cfg.bytes.field1 = 3;
  88        cfg.bytes.field2 = 3;
  89        cfg.bytes.field3 = (pio_specs.t1 + t) / t;
  90        cfg.bytes.field4 = (pio_specs.t2_8 + t) / t;
  91
  92        out_be32(&im->pata.pata_time1, cfg.config);
  93
  94        cfg.bytes.field1 = (pio_specs.t2_8 + t) / t;
  95        cfg.bytes.field2 = (pio_specs.tA + t) / t + 2;
  96        cfg.bytes.field3 = 1;
  97        cfg.bytes.field4 = (pio_specs.t4 + t) / t;
  98
  99        out_be32(&im->pata.pata_time2, cfg.config);
 100
 101        cfg.config = in_be32(&im->pata.pata_time3);
 102        cfg.bytes.field1 = (pio_specs.t9 + t) / t;
 103
 104        out_be32(&im->pata.pata_time3, cfg.config);
 105
 106        debug ("PATA preinit complete.\n");
 107
 108        return 0;
 109}
 110
 111#endif /* defined(CONFIG_IDE_RESET) */
 112