LXR uboot/drivers/i2c/sh_sh7734

   1/*
   2 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
   3 * Copyright (C) 2012 Renesas Solutions Corp.
   4 *
   5 * SPDX-License-Identifier:     GPL-2.0+
   6 */
   7
   8#include <common.h>
   9#include <i2c.h>
  10#include <asm/io.h>
  11
  12struct sh_i2c {
  13        u8 iccr1;
  14        u8 iccr2;
  15        u8 icmr;
  16        u8 icier;
  17        u8 icsr;
  18        u8 sar;
  19        u8 icdrt;
  20        u8 icdrr;
  21        u8 nf2cyc;
  22        u8 __pad0;
  23        u8 __pad1;
  24};
  25
  26static struct sh_i2c *base;
  27static u8 iccr1_cks, nf2cyc;
  28
  29/* ICCR1 */
  30#define SH_I2C_ICCR1_ICE        (1 << 7)
  31#define SH_I2C_ICCR1_RCVD       (1 << 6)
  32#define SH_I2C_ICCR1_MST        (1 << 5)
  33#define SH_I2C_ICCR1_TRS        (1 << 4)
  34#define SH_I2C_ICCR1_MTRS       \
  35        (SH_I2C_ICCR1_MST | SH_I2C_ICCR1_TRS)
  36
  37/* ICCR1 */
  38#define SH_I2C_ICCR2_BBSY       (1 << 7)
  39#define SH_I2C_ICCR2_SCP        (1 << 6)
  40#define SH_I2C_ICCR2_SDAO       (1 << 5)
  41#define SH_I2C_ICCR2_SDAOP      (1 << 4)
  42#define SH_I2C_ICCR2_SCLO       (1 << 3)
  43#define SH_I2C_ICCR2_IICRST     (1 << 1)
  44
  45#define SH_I2C_ICIER_TIE        (1 << 7)
  46#define SH_I2C_ICIER_TEIE       (1 << 6)
  47#define SH_I2C_ICIER_RIE        (1 << 5)
  48#define SH_I2C_ICIER_NAKIE      (1 << 4)
  49#define SH_I2C_ICIER_STIE       (1 << 3)
  50#define SH_I2C_ICIER_ACKE       (1 << 2)
  51#define SH_I2C_ICIER_ACKBR      (1 << 1)
  52#define SH_I2C_ICIER_ACKBT      (1 << 0)
  53
  54#define SH_I2C_ICSR_TDRE        (1 << 7)
  55#define SH_I2C_ICSR_TEND        (1 << 6)
  56#define SH_I2C_ICSR_RDRF        (1 << 5)
  57#define SH_I2C_ICSR_NACKF       (1 << 4)
  58#define SH_I2C_ICSR_STOP        (1 << 3)
  59#define SH_I2C_ICSR_ALOVE       (1 << 2)
  60#define SH_I2C_ICSR_AAS         (1 << 1)
  61#define SH_I2C_ICSR_ADZ         (1 << 0)
  62
  63#define IRQ_WAIT 1000
  64
  65static void sh_i2c_send_stop(struct sh_i2c *base)
  66{
  67        clrbits_8(&base->iccr2, SH_I2C_ICCR2_BBSY | SH_I2C_ICCR2_SCP);
  68}
  69
  70static int check_icsr_bits(struct sh_i2c *base, u8 bits)
  71{
  72        int i;
  73
  74        for (i = 0; i < IRQ_WAIT; i++) {
  75                if (bits & readb(&base->icsr))
  76                        return 0;
  77                udelay(10);
  78        }
  79
  80        return 1;
  81}
  82
  83static int check_stop(struct sh_i2c *base)
  84{
  85        int ret = check_icsr_bits(base, SH_I2C_ICSR_STOP);
  86        clrbits_8(&base->icsr, SH_I2C_ICSR_STOP);
  87
  88        return ret;
  89}
  90
  91static int check_tend(struct sh_i2c *base, int stop)
  92{
  93        int ret = check_icsr_bits(base, SH_I2C_ICSR_TEND);
  94
  95        if (stop) {
  96                clrbits_8(&base->icsr, SH_I2C_ICSR_STOP);
  97                sh_i2c_send_stop(base);
  98        }
  99
 100        clrbits_8(&base->icsr, SH_I2C_ICSR_TEND);
 101        return ret;
 102}
 103
 104static int check_tdre(struct sh_i2c *base)
 105{
 106        return check_icsr_bits(base, SH_I2C_ICSR_TDRE);
 107}
 108
 109static int check_rdrf(struct sh_i2c *base)
 110{
 111        return check_icsr_bits(base, SH_I2C_ICSR_RDRF);
 112}
 113
 114static int check_bbsy(struct sh_i2c *base)
 115{
 116        int i;
 117
 118        for (i = 0 ; i < IRQ_WAIT ; i++) {
 119                if (!(SH_I2C_ICCR2_BBSY & readb(&base->iccr2)))
 120                        return 0;
 121                udelay(10);
 122        }
 123        return 1;
 124}
 125
 126static int check_ackbr(struct sh_i2c *base)
 127{
 128        int i;
 129
 130        for (i = 0 ; i < IRQ_WAIT ; i++) {
 131                if (!(SH_I2C_ICIER_ACKBR & readb(&base->icier)))
 132                        return 0;
 133                udelay(10);
 134        }
 135
 136        return 1;
 137}
 138
 139static void sh_i2c_reset(struct sh_i2c *base)
 140{
 141        setbits_8(&base->iccr2, SH_I2C_ICCR2_IICRST);
 142
 143        udelay(100);
 144
 145        clrbits_8(&base->iccr2, SH_I2C_ICCR2_IICRST);
 146}
 147
 148static int i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg)
 149{
 150        if (check_bbsy(base)) {
 151                puts("i2c bus busy\n");
 152                goto fail;
 153        }
 154
 155        setbits_8(&base->iccr1, SH_I2C_ICCR1_MTRS);
 156        clrsetbits_8(&base->iccr2, SH_I2C_ICCR2_SCP, SH_I2C_ICCR2_BBSY);
 157
 158        writeb((id << 1), &base->icdrt);
 159
 160        if (check_tend(base, 0)) {
 161                puts("TEND check fail...\n");
 162                goto fail;
 163        }
 164
 165        if (check_ackbr(base)) {
 166                check_tend(base, 0);
 167                sh_i2c_send_stop(base);
 168                goto fail;
 169        }
 170
 171        writeb(reg, &base->icdrt);
 172
 173        if (check_tdre(base)) {
 174                puts("TDRE check fail...\n");
 175                goto fail;
 176        }
 177
 178        if (check_tend(base, 0)) {
 179                puts("TEND check fail...\n");
 180                goto fail;
 181        }
 182
 183        return 0;
 184fail:
 185
 186        return 1;
 187}
 188
 189static int
 190i2c_raw_write(struct sh_i2c *base, u8 id, u8 reg, u8 *val, int size)
 191{
 192        int i;
 193
 194        if (i2c_set_addr(base, id, reg)) {
 195                puts("Fail set slave address\n");
 196                return 1;
 197        }
 198
 199        for (i = 0; i < size; i++) {
 200                writeb(val[i], &base->icdrt);
 201                check_tdre(base);
 202        }
 203
 204        check_tend(base, 1);
 205        check_stop(base);
 206
 207        udelay(100);
 208
 209        clrbits_8(&base->iccr1, SH_I2C_ICCR1_MTRS);
 210        clrbits_8(&base->icsr, SH_I2C_ICSR_TDRE);
 211        sh_i2c_reset(base);
 212
 213        return 0;
 214}
 215
 216static u8 i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)
 217{
 218        u8 ret = 0;
 219
 220        if (i2c_set_addr(base, id, reg)) {
 221                puts("Fail set slave address\n");
 222                goto fail;
 223        }
 224
 225        clrsetbits_8(&base->iccr2, SH_I2C_ICCR2_SCP, SH_I2C_ICCR2_BBSY);
 226        writeb((id << 1) | 1, &base->icdrt);
 227
 228        if (check_tend(base, 0))
 229                puts("TDRE check fail...\n");
 230
 231        clrsetbits_8(&base->iccr1, SH_I2C_ICCR1_TRS, SH_I2C_ICCR1_MST);
 232        clrbits_8(&base->icsr, SH_I2C_ICSR_TDRE);
 233        setbits_8(&base->icier, SH_I2C_ICIER_ACKBT);
 234        setbits_8(&base->iccr1, SH_I2C_ICCR1_RCVD);
 235
 236        /* read data (dummy) */
 237        ret = readb(&base->icdrr);
 238
 239        if (check_rdrf(base)) {
 240                puts("check RDRF error\n");
 241                goto fail;
 242        }
 243
 244        clrbits_8(&base->icsr, SH_I2C_ICSR_STOP);
 245        udelay(1000);
 246
 247        sh_i2c_send_stop(base);
 248
 249        if (check_stop(base)) {
 250                puts("check STOP error\n");
 251                goto fail;
 252        }
 253
 254        clrbits_8(&base->iccr1, SH_I2C_ICCR1_MTRS);
 255        clrbits_8(&base->icsr, SH_I2C_ICSR_TDRE);
 256
 257        /* data read */
 258        ret = readb(&base->icdrr);
 259
 260fail:
 261        clrbits_8(&base->iccr1, SH_I2C_ICCR1_RCVD);
 262
 263        return ret;
 264}
 265
 266#ifdef CONFIG_I2C_MULTI_BUS
 267static unsigned int current_bus;
 268
 269/**
 270 * i2c_set_bus_num - change active I2C bus
 271 *      @bus: bus index, zero based
 272 *      @returns: 0 on success, non-0 on failure
 273 */
 274int i2c_set_bus_num(unsigned int bus)
 275{
 276        switch (bus) {
 277        case 0:
 278                base = (void *)CONFIG_SH_I2C_BASE0;
 279                break;
 280        case 1:
 281                base = (void *)CONFIG_SH_I2C_BASE1;
 282                break;
 283        default:
 284                printf("Bad bus: %d\n", bus);
 285                return -1;
 286        }
 287
 288        current_bus = bus;
 289
 290        return 0;
 291}
 292
 293/**
 294 * i2c_get_bus_num - returns index of active I2C bus
 295 */
 296unsigned int i2c_get_bus_num(void)
 297{
 298        return current_bus;
 299}
 300#endif
 301
 302void i2c_init(int speed, int slaveaddr)
 303{
 304#ifdef CONFIG_I2C_MULTI_BUS
 305        current_bus = 0;
 306#endif
 307        base = (struct sh_i2c *)CONFIG_SH_I2C_BASE0;
 308
 309        if (speed == 400000)
 310                iccr1_cks = 0x07;
 311        else
 312                iccr1_cks = 0x0F;
 313
 314        nf2cyc = 1;
 315
 316        /* Reset */
 317        sh_i2c_reset(base);
 318
 319        /* ICE enable and set clock */
 320        writeb(SH_I2C_ICCR1_ICE | iccr1_cks, &base->iccr1);
 321        writeb(nf2cyc, &base->nf2cyc);
 322}
 323
 324/*
 325 * i2c_read: - Read multiple bytes from an i2c device
 326 *
 327 * The higher level routines take into account that this function is only
 328 * called with len < page length of the device (see configuration file)
 329 *
 330 * @chip:   address of the chip which is to be read
 331 * @addr:   i2c data address within the chip
 332 * @alen:   length of the i2c data address (1..2 bytes)
 333 * @buffer: where to write the data
 334 * @len:    how much byte do we want to read
 335 * @return: 0 in case of success
 336 */
 337int i2c_read(u8 chip, u32 addr, int alen, u8 *buffer, int len)
 338{
 339        int i = 0;
 340        for (i = 0; i < len; i++)
 341                buffer[i] = i2c_raw_read(base, chip, addr + i);
 342
 343        return 0;
 344}
 345
 346/*
 347 * i2c_write: -  Write multiple bytes to an i2c device
 348 *
 349 * The higher level routines take into account that this function is only
 350 * called with len < page length of the device (see configuration file)
 351 *
 352 * @chip:   address of the chip which is to be written
 353 * @addr:   i2c data address within the chip
 354 * @alen:   length of the i2c data address (1..2 bytes)
 355 * @buffer: where to find the data to be written
 356 * @len:    how much byte do we want to read
 357 * @return: 0 in case of success
 358 */
 359int i2c_write(u8 chip, u32 addr, int alen, u8 *buffer, int len)
 360{
 361        return i2c_raw_write(base, chip, addr, buffer, len);
 362}
 363
 364/*
 365 * i2c_probe: - Test if a chip answers for a given i2c address
 366 *
 367 * @chip:   address of the chip which is searched for
 368 * @return: 0 if a chip was found, -1 otherwhise
 369 */
 370int i2c_probe(u8 chip)
 371{
 372        u8 byte;
 373        return i2c_read(chip, 0, 0, &byte, 1);
 374}
 375