LXR uboot/arch/arm/cpu/armv7/stv0991/timer.c

   1/*
   2 * (C) Copyright 2014
   3 * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com.
   4 *
   5 * SPDX-License-Identifier:     GPL-2.0+
   6 */
   7
   8#include <common.h>
   9#include <asm/io.h>
  10#include <asm/arch-stv0991/hardware.h>
  11#include <asm/arch-stv0991/stv0991_cgu.h>
  12#include <asm/arch-stv0991/stv0991_gpt.h>
  13
  14static struct stv0991_cgu_regs *const stv0991_cgu_regs = \
  15                                (struct stv0991_cgu_regs *) (CGU_BASE_ADDR);
  16
  17#define READ_TIMER()    (readl(&gpt1_regs_ptr->cnt) & GPT_FREE_RUNNING)
  18#define GPT_RESOLUTION  (CONFIG_STV0991_HZ_CLOCK / CONFIG_STV0991_HZ)
  19
  20DECLARE_GLOBAL_DATA_PTR;
  21
  22#define timestamp gd->arch.tbl
  23#define lastdec gd->arch.lastinc
  24
  25int timer_init(void)
  26{
  27        /* Timer1 clock configuration */
  28        writel(TIMER1_CLK_CFG, &stv0991_cgu_regs->tim_freq);
  29        writel(readl(&stv0991_cgu_regs->cgu_enable_2) |
  30                        TIMER1_CLK_EN, &stv0991_cgu_regs->cgu_enable_2);
  31
  32        /* Stop the timer */
  33        writel(readl(&gpt1_regs_ptr->cr1) & ~GPT_CR1_CEN, &gpt1_regs_ptr->cr1);
  34        writel(GPT_PRESCALER_128, &gpt1_regs_ptr->psc);
  35        /* Configure timer for auto-reload */
  36        writel(readl(&gpt1_regs_ptr->cr1) | GPT_MODE_AUTO_RELOAD,
  37                        &gpt1_regs_ptr->cr1);
  38
  39        /* load value for free running */
  40        writel(GPT_FREE_RUNNING, &gpt1_regs_ptr->arr);
  41
  42        /* start timer */
  43        writel(readl(&gpt1_regs_ptr->cr1) | GPT_CR1_CEN,
  44                        &gpt1_regs_ptr->cr1);
  45
  46        /* Reset the timer */
  47        lastdec = READ_TIMER();
  48        timestamp = 0;
  49
  50        return 0;
  51}
  52
  53/*
  54 * timer without interrupts
  55 */
  56ulong get_timer(ulong base)
  57{
  58        return (get_timer_masked() / GPT_RESOLUTION) - base;
  59}
  60
  61void __udelay(unsigned long usec)
  62{
  63        ulong tmo;
  64        ulong start = get_timer_masked();
  65        ulong tenudelcnt = CONFIG_STV0991_HZ_CLOCK / (1000 * 100);
  66        ulong rndoff;
  67
  68        rndoff = (usec % 10) ? 1 : 0;
  69
  70        /* tenudelcnt timer tick gives 10 microsecconds delay */
  71        tmo = ((usec / 10) + rndoff) * tenudelcnt;
  72
  73        while ((ulong) (get_timer_masked() - start) < tmo)
  74                ;
  75}
  76
  77ulong get_timer_masked(void)
  78{
  79        ulong now = READ_TIMER();
  80
  81        if (now >= lastdec) {
  82                /* normal mode */
  83                timestamp += now - lastdec;
  84        } else {
  85                /* we have an overflow ... */
  86                timestamp += now + GPT_FREE_RUNNING - lastdec;
  87        }
  88        lastdec = now;
  89
  90        return timestamp;
  91}
  92
  93void udelay_masked(unsigned long usec)
  94{
  95        return udelay(usec);
  96}
  97
  98/*
  99 * This function is derived from PowerPC code (read timebase as long long).
 100 * On ARM it just returns the timer value.
 101 */
 102unsigned long long get_ticks(void)
 103{
 104        return get_timer(0);
 105}
 106
 107/*
 108 * This function is derived from PowerPC code (timebase clock frequency).
 109 * On ARM it returns the number of timer ticks per second.
 110 */
 111ulong get_tbclk(void)
 112{
 113        return CONFIG_STV0991_HZ;
 114}
 115