1/* 2 * linux/include/asm-arm/arch-pxa/hardware.h 3 * 4 * Author: Nicolas Pitre 5 * Created: Jun 15, 2001 6 * Copyright: MontaVista Software Inc. 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * Note: This file was taken from linux-2.4.19-rmk4-pxa1 13 * 14 * - 2003/01/20 implementation specifics activated 15 * Robert Schwebel <r.schwebel@pengutronix.de> 16 */ 17 18#ifndef __ASM_ARCH_HARDWARE_H 19#define __ASM_ARCH_HARDWARE_H 20 21#include <asm/mach-types.h> 22 23/* 24 * Define CONFIG_CPU_MONAHANS in case some CPU of the PXA3xx family is selected. 25 * PXA300/310/320 all have distinct register mappings in some cases, that's why 26 * the exact CPU has to be selected. CONFIG_CPU_MONAHANS is a helper for common 27 * drivers and compatibility glue with old source then. 28 */ 29#ifndef CONFIG_CPU_MONAHANS 30#if defined(CONFIG_CPU_PXA300) || \ 31 defined(CONFIG_CPU_PXA310) || \ 32 defined(CONFIG_CPU_PXA320) 33#define CONFIG_CPU_MONAHANS 34#endif 35#endif 36 37/* 38 * These are statically mapped PCMCIA IO space for designs using it as a 39 * generic IO bus, typically with ISA parts, hardwired IDE interfaces, etc. 40 * The actual PCMCIA code is mapping required IO region at run time. 41 */ 42#define PCMCIA_IO_0_BASE 0xf6000000 43#define PCMCIA_IO_1_BASE 0xf7000000 44 45 46/* 47 * We requires absolute addresses. 48 */ 49#define PCIO_BASE 0 50 51/* 52 * Workarounds for at least 2 errata so far require this. 53 * The mapping is set in mach-pxa/generic.c. 54 */ 55#define UNCACHED_PHYS_0 0xff000000 56#define UNCACHED_ADDR UNCACHED_PHYS_0 57 58/* 59 * Intel PXA internal I/O mappings: 60 * 61 * 0x40000000 - 0x41ffffff <--> 0xf8000000 - 0xf9ffffff 62 * 0x44000000 - 0x45ffffff <--> 0xfa000000 - 0xfbffffff 63 * 0x48000000 - 0x49ffffff <--> 0xfc000000 - 0xfdffffff 64 */ 65 66#include "pxa-regs.h" 67 68#ifndef __ASSEMBLY__ 69 70/* 71 * GPIO edge detection for IRQs: 72 * IRQs are generated on Falling-Edge, Rising-Edge, or both. 73 * This must be called *before* the corresponding IRQ is registered. 74 * Use this instead of directly setting GRER/GFER. 75 */ 76#define GPIO_FALLING_EDGE 1 77#define GPIO_RISING_EDGE 2 78#define GPIO_BOTH_EDGES 3 79 80#endif 81 82 83/* 84 * Implementation specifics 85 */ 86 87#ifdef CONFIG_ARCH_LUBBOCK 88#include "lubbock.h" 89#endif 90 91#ifdef CONFIG_ARCH_PXA_IDP 92#include "idp.h" 93#endif 94 95#ifdef CONFIG_ARCH_PXA_CERF 96#include "cerf.h" 97#endif 98 99#ifdef CONFIG_ARCH_CSB226 100#include "csb226.h" 101#endif 102 103#ifdef CONFIG_ARCH_INNOKOM 104#include "innokom.h" 105#endif 106 107#ifdef CONFIG_ARCH_PLEB 108#include "pleb.h" 109#endif 110 111#endif /* _ASM_ARCH_HARDWARE_H */ 112