LXR uboot/arch/arm/include/asm/imx-common/sys

   1/*
   2 * (C) Copyright 2009
   3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
   4 *
   5 * SPDX-License-Identifier:     GPL-2.0+
   6 */
   7
   8#ifndef _SYS_PROTO_H_
   9#define _SYS_PROTO_H_
  10
  11#include <asm/imx-common/regs-common.h>
  12#include <common.h>
  13#include "../arch-imx/cpu.h"
  14
  15#define soc_rev() (get_cpu_rev() & 0xFF)
  16#define is_soc_rev(rev) (soc_rev() == rev)
  17
  18/* returns MXC_CPU_ value */
  19#define cpu_type(rev) (((rev) >> 12) & 0xff)
  20#define soc_type(rev) (((rev) >> 12) & 0xf0)
  21/* both macros return/take MXC_CPU_ constants */
  22#define get_cpu_type() (cpu_type(get_cpu_rev()))
  23#define get_soc_type() (soc_type(get_cpu_rev()))
  24#define is_cpu_type(cpu) (get_cpu_type() == cpu)
  25#define is_soc_type(soc) (get_soc_type() == soc)
  26
  27#define is_mx6() (is_soc_type(MXC_SOC_MX6))
  28#define is_mx7() (is_soc_type(MXC_SOC_MX7))
  29
  30#define is_mx6dqp() (is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP))
  31#define is_mx6dq() (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D))
  32#define is_mx6sdl() (is_cpu_type(MXC_CPU_MX6SOLO) || is_cpu_type(MXC_CPU_MX6DL))
  33#define is_mx6dl() (is_cpu_type(MXC_CPU_MX6DL))
  34#define is_mx6sx() (is_cpu_type(MXC_CPU_MX6SX))
  35#define is_mx6sl() (is_cpu_type(MXC_CPU_MX6SL))
  36#define is_mx6solo() (is_cpu_type(MXC_CPU_MX6SOLO))
  37#define is_mx6ul() (is_cpu_type(MXC_CPU_MX6UL))
  38#define is_mx6ull() (is_cpu_type(MXC_CPU_MX6ULL))
  39
  40u32 get_nr_cpus(void);
  41u32 get_cpu_rev(void);
  42u32 get_cpu_speed_grade_hz(void);
  43u32 get_cpu_temp_grade(int *minc, int *maxc);
  44const char *get_imx_type(u32 imxtype);
  45u32 imx_ddr_size(void);
  46void sdelay(unsigned long);
  47void set_chipselect_size(int const);
  48
  49void init_aips(void);
  50void init_src(void);
  51void imx_set_wdog_powerdown(bool enable);
  52
  53/*
  54 * Initializes on-chip ethernet controllers.
  55 * to override, implement board_eth_init()
  56 */
  57int fecmxc_initialize(bd_t *bis);
  58u32 get_ahb_clk(void);
  59u32 get_periph_clk(void);
  60
  61void lcdif_power_down(void);
  62
  63int mxs_reset_block(struct mxs_register_32 *reg);
  64int mxs_wait_mask_set(struct mxs_register_32 *reg, u32 mask, u32 timeout);
  65int mxs_wait_mask_clr(struct mxs_register_32 *reg, u32 mask, u32 timeout);
  66#endif
  67