1/* 2 * Genericish driver for memory mapped NAND devices 3 * 4 * Copyright (c) 2006-2009 Analog Devices Inc. 5 * Licensed under the GPL-2 or later. 6 */ 7 8/* Your board must implement the following macros: 9 * NAND_PLAT_WRITE_CMD(chip, cmd) 10 * NAND_PLAT_WRITE_ADR(chip, cmd) 11 * NAND_PLAT_INIT() 12 * 13 * It may also implement the following: 14 * NAND_PLAT_DEV_READY(chip) 15 */ 16 17#include <common.h> 18#include <asm/io.h> 19#ifdef NAND_PLAT_GPIO_DEV_READY 20# include <asm/gpio.h> 21# define NAND_PLAT_DEV_READY(chip) gpio_get_value(NAND_PLAT_GPIO_DEV_READY) 22#endif 23 24#include <nand.h> 25 26static void plat_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) 27{ 28 struct nand_chip *this = mtd_to_nand(mtd); 29 30 if (cmd == NAND_CMD_NONE) 31 return; 32 33 if (ctrl & NAND_CLE) 34 NAND_PLAT_WRITE_CMD(this, cmd); 35 else 36 NAND_PLAT_WRITE_ADR(this, cmd); 37} 38 39#ifdef NAND_PLAT_DEV_READY 40static int plat_dev_ready(struct mtd_info *mtd) 41{ 42 return NAND_PLAT_DEV_READY((struct nand_chip *)mtd_to_nand(mtd)); 43} 44#else 45# define plat_dev_ready NULL 46#endif 47 48int board_nand_init(struct nand_chip *nand) 49{ 50#ifdef NAND_PLAT_GPIO_DEV_READY 51 gpio_request(NAND_PLAT_GPIO_DEV_READY, "nand-plat"); 52 gpio_direction_input(NAND_PLAT_GPIO_DEV_READY); 53#endif 54 55#ifdef NAND_PLAT_INIT 56 NAND_PLAT_INIT(); 57#endif 58 59 nand->cmd_ctrl = plat_cmd_ctrl; 60 nand->dev_ready = plat_dev_ready; 61 nand->ecc.mode = NAND_ECC_SOFT; 62 63 return 0; 64} 65