1/* 2 * U-Boot - Configuration file for BF536 brettl2 board 3 */ 4 5#ifndef __CONFIG_BCT_BRETTL2_H__ 6#define __CONFIG_BCT_BRETTL2_H__ 7 8#include <asm/config-pre.h> 9 10/* 11 * Processor Settings 12 */ 13#define CONFIG_BFIN_CPU bf536-0.3 14#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS 15 16/* 17 * Clock Settings 18 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV 19 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV 20 */ 21/* CONFIG_CLKIN_HZ is any value in Hz */ 22#define CONFIG_CLKIN_HZ 16384000 23/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ 24/* 1 = CLKIN / 2 */ 25#define CONFIG_CLKIN_HALF 0 26/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ 27/* 1 = bypass PLL */ 28#define CONFIG_PLL_BYPASS 0 29/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ 30/* Values can range from 0-63 (where 0 means 64) */ 31#define CONFIG_VCO_MULT 24 32/* CCLK_DIV controls the core clock divider */ 33/* Values can be 1, 2, 4, or 8 ONLY */ 34#define CONFIG_CCLK_DIV 1 35/* SCLK_DIV controls the system clock divider */ 36/* Values can range from 1-15 */ 37#define CONFIG_SCLK_DIV 3 38#define CONFIG_VR_CTL_VAL (VLEV_110 | GAIN_20 | FREQ_1000) 39 40/* 41 * Memory Settings 42 */ 43#define CONFIG_MEM_ADD_WDTH 9 44#define CONFIG_MEM_SIZE 32 45 46/* 47 * SDRAM Settings 48 */ 49#define CONFIG_EBIU_SDRRC_VAL 0x07f6 50#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd 51 52#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL) 53#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) 54#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) 55 56#define CONFIG_SYS_MONITOR_LEN (256 * 1024) 57#define CONFIG_SYS_MALLOC_LEN (128 * 1024) 58 59/* 60 * Network Settings 61 */ 62#ifndef __ADSPBF534__ 63#define ADI_CMDS_NETWORK 1 64#define CONFIG_BFIN_MAC 1 65#define CONFIG_NETCONSOLE 1 66#define CONFIG_HOSTNAME brettl2 67#define CONFIG_IPADDR 192.168.233.224 68#define CONFIG_GATEWAYIP 192.168.233.1 69#define CONFIG_SERVERIP 192.168.233.53 70#define CONFIG_ROOTPATH "/romfs/brettl2" 71#endif 72 73/* 74 * Flash Settings 75 */ 76#define CONFIG_FLASH_CFI_DRIVER 77#define CONFIG_SYS_FLASH_CFI 78#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS 79#define CONFIG_SYS_FLASH_PROTECTION 80#define CONFIG_SYS_FLASH_BASE 0x20000000 81#define CONFIG_SYS_MAX_FLASH_BANKS 1 82#define CONFIG_SYS_MAX_FLASH_SECT 135 83 84/* 85 * Env Storage Settings 86 */ 87#define CONFIG_ENV_IS_IN_FLASH 1 88#define CONFIG_ENV_OFFSET 0x4000 89#define CONFIG_ENV_SIZE 0x2000 90#define CONFIG_ENV_SECT_SIZE 0x12000 91 92#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) 93#define ENV_IS_EMBEDDED 94#else 95#define CONFIG_ENV_IS_EMBEDDED_IN_LDR 96#endif 97 98#ifdef ENV_IS_EMBEDDED 99/* WARNING - the following is hand-optimized to fit within 100 * the sector before the environment sector. If it throws 101 * an error during compilation remove an object here to get 102 * it linked after the configuration sector. 103 */ 104# define LDS_BOARD_TEXT \ 105 arch/blackfin/lib/built-in.o (.text*); \ 106 arch/blackfin/cpu/built-in.o (.text*); \ 107 . = DEFINED(env_offset) ? env_offset : .; \ 108 common/env_embedded.o (.text*); 109#endif 110 111/* 112 * I2C Settings 113 */ 114#define CONFIG_SYS_I2C 115#define CONFIG_SYS_I2C_ADI 116 117/* 118 * Misc Settings 119 */ 120#define CONFIG_LOADADDR 0x800000 121#define CONFIG_MISC_INIT_R 122#define CONFIG_UART_CONSOLE 0 123#define CONFIG_BAUDRATE 115200 124#define CONFIG_MTD_DEVICE 125#define CONFIG_MTD_PARTITIONS 126 127/* 128 * Pull in common ADI header for remaining command/environment setup 129 */ 130#include <configs/bfin_adi_common.h> 131 132/* disable unnecessary features */ 133#undef CONFIG_BOOTM_RTEMS 134#undef CONFIG_BZIP2 135#undef CONFIG_KALLSYMS 136 137#endif 138