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13#ifndef __CONFIG_CGTQMX6EVAL_H
14#define __CONFIG_CGTQMX6EVAL_H
15
16#include "mx6_common.h"
17
18#define CONFIG_MACH_TYPE 4122
19
20#ifdef CONFIG_SPL
21#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
22#define CONFIG_SPL_SPI_LOAD
23#include "imx6_spl.h"
24#endif
25
26
27#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
28
29#define CONFIG_BOARD_EARLY_INIT_F
30#define CONFIG_BOARD_LATE_INIT
31#define CONFIG_MISC_INIT_R
32
33#define CONFIG_MXC_UART
34#define CONFIG_MXC_UART_BASE UART2_BASE
35
36
37#define CONFIG_SYS_FSL_ESDHC_ADDR 0
38
39
40#define CONFIG_SPI_FLASH
41#define CONFIG_SPI_FLASH_STMICRO
42#define CONFIG_SPI_FLASH_SST
43#define CONFIG_MXC_SPI
44#define CONFIG_SF_DEFAULT_BUS 0
45#define CONFIG_SF_DEFAULT_SPEED 20000000
46#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
47
48
49#define CONFIG_CMD_BMODE
50
51
52#define CONFIG_IMX_THERMAL
53
54
55#define CONFIG_SYS_I2C
56#define CONFIG_SYS_I2C_MXC
57#define CONFIG_SYS_I2C_MXC_I2C1
58#define CONFIG_SYS_I2C_MXC_I2C2
59#define CONFIG_SYS_I2C_MXC_I2C2
60#define CONFIG_SYS_I2C_SPEED 100000
61
62
63#define CONFIG_POWER
64#define CONFIG_POWER_I2C
65#define CONFIG_POWER_PFUZE100
66#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
67
68
69#define CONFIG_USB_EHCI
70#define CONFIG_USB_EHCI_MX6
71#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
72#define CONFIG_USB_HOST_ETHER
73#define CONFIG_USB_ETHER_ASIX
74#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
75#define CONFIG_MXC_USB_FLAGS 0
76#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
77#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
78
79#define CONFIG_USBD_HS
80
81#define CONFIG_USB_FUNCTION_MASS_STORAGE
82
83#define CONFIG_USB_FUNCTION_FASTBOOT
84#define CONFIG_CMD_FASTBOOT
85#define CONFIG_ANDROID_BOOT_IMAGE
86#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
87#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
88
89
90#define CONFIG_VIDEO_IPUV3
91#define CONFIG_VIDEO_BMP_RLE8
92#define CONFIG_SPLASH_SCREEN
93#define CONFIG_SPLASH_SCREEN_ALIGN
94#define CONFIG_BMP_16BPP
95#define CONFIG_VIDEO_LOGO
96#define CONFIG_VIDEO_BMP_LOGO
97#ifdef CONFIG_MX6DL
98#define CONFIG_IPUV3_CLK 198000000
99#else
100#define CONFIG_IPUV3_CLK 264000000
101#endif
102#define CONFIG_IMX_HDMI
103
104
105#define CONFIG_CMD_SATA
106#define CONFIG_DWC_AHSATA
107#define CONFIG_SYS_SATA_MAX_DEVICE 1
108#define CONFIG_DWC_AHSATA_PORT_ID 0
109#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
110#define CONFIG_LBA48
111#define CONFIG_LIBATA
112
113
114#define CONFIG_FEC_MXC
115#define CONFIG_MII
116#define IMX_FEC_BASE ENET_BASE_ADDR
117#define CONFIG_FEC_XCV_TYPE RGMII
118#define CONFIG_ETHPRIME "FEC"
119#define CONFIG_FEC_MXC_PHYADDR 6
120#define CONFIG_PHYLIB
121#define CONFIG_PHY_ATHEROS
122
123
124
125#define CONFIG_MXC_UART_BASE UART2_BASE
126#define CONSOLE_DEV "ttymxc1"
127#define CONFIG_MMCROOT "/dev/mmcblk0p2"
128#define CONFIG_SYS_MMC_ENV_DEV 0
129
130#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
131#define CONFIG_EXTRA_ENV_SETTINGS \
132 "script=boot.scr\0" \
133 "image=zImage\0" \
134 "fdtfile=undefined\0" \
135 "fdt_addr_r=0x18000000\0" \
136 "boot_fdt=try\0" \
137 "ip_dyn=yes\0" \
138 "console=" CONSOLE_DEV "\0" \
139 "dfuspi=dfu 0 sf 0:0:10000000:0\0" \
140 "dfu_alt_info_spl=spl raw 0x400\0" \
141 "dfu_alt_info_img=u-boot raw 0x10000\0" \
142 "dfu_alt_info=spl raw 0x400\0" \
143 "bootm_size=0x10000000\0" \
144 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
145 "mmcpart=1\0" \
146 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
147 "update_sd_firmware=" \
148 "if test ${ip_dyn} = yes; then " \
149 "setenv get_cmd dhcp; " \
150 "else " \
151 "setenv get_cmd tftp; " \
152 "fi; " \
153 "if mmc dev ${mmcdev}; then " \
154 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
155 "setexpr fw_sz ${filesize} / 0x200; " \
156 "setexpr fw_sz ${fw_sz} + 1; " \
157 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
158 "fi; " \
159 "fi\0" \
160 "mmcargs=setenv bootargs console=${console},${baudrate} " \
161 "root=${mmcroot}\0" \
162 "loadbootscript=" \
163 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
164 "bootscript=echo Running bootscript from mmc ...; " \
165 "source\0" \
166 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
167 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \
168 "mmcboot=echo Booting from mmc ...; " \
169 "run mmcargs; " \
170 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
171 "if run loadfdt; then " \
172 "bootz ${loadaddr} - ${fdt_addr_r}; " \
173 "else " \
174 "if test ${boot_fdt} = try; then " \
175 "bootz; " \
176 "else " \
177 "echo WARN: Cannot load the DT; " \
178 "fi; " \
179 "fi; " \
180 "else " \
181 "bootz; " \
182 "fi;\0" \
183 "findfdt="\
184 "if test $board_rev = MX6Q ; then " \
185 "setenv fdtfile imx6q-qmx6.dtb; fi; " \
186 "if test $board_rev = MX6DL ; then " \
187 "setenv fdtfile imx6dl-qmx6.dtb; fi; " \
188 "if test $fdtfile = undefined; then " \
189 "echo WARNING: Could not determine dtb to use; fi; \0" \
190 "netargs=setenv bootargs console=${console},${baudrate} " \
191 "root=/dev/nfs " \
192 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
193 "netboot=echo Booting from net ...; " \
194 "run netargs; " \
195 "if test ${ip_dyn} = yes; then " \
196 "setenv get_cmd dhcp; " \
197 "else " \
198 "setenv get_cmd tftp; " \
199 "fi; " \
200 "${get_cmd} ${image}; " \
201 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
202 "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \
203 "bootz ${loadaddr} - ${fdt_addr_r}; " \
204 "else " \
205 "if test ${boot_fdt} = try; then " \
206 "bootz; " \
207 "else " \
208 "echo WARN: Cannot load the DT; " \
209 "fi; " \
210 "fi; " \
211 "else " \
212 "bootz; " \
213 "fi;\0" \
214 "spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\
215
216#define CONFIG_BOOTCOMMAND \
217 "run spilock;" \
218 "run findfdt; " \
219 "mmc dev ${mmcdev};" \
220 "if mmc rescan; then " \
221 "if run loadbootscript; then " \
222 "run bootscript; " \
223 "else " \
224 "if run loadimage; then " \
225 "run mmcboot; " \
226 "else run netboot; " \
227 "fi; " \
228 "fi; " \
229 "else run netboot; fi"
230
231#define CONFIG_SYS_MEMTEST_START 0x10000000
232#define CONFIG_SYS_MEMTEST_END 0x10010000
233#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
234
235
236#define CONFIG_NR_DRAM_BANKS 1
237#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
238
239#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
240#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
241#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
242
243#define CONFIG_SYS_INIT_SP_OFFSET \
244 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
245#define CONFIG_SYS_INIT_SP_ADDR \
246 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
247
248
249#if defined (CONFIG_ENV_IS_IN_MMC)
250#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
251#define CONFIG_SYS_MMC_ENV_DEV 0
252#endif
253
254#define CONFIG_ENV_SIZE (8 * 1024)
255
256#define CONFIG_ENV_IS_IN_SPI_FLASH
257#if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
258#define CONFIG_ENV_OFFSET (768 * 1024)
259#define CONFIG_ENV_SECT_SIZE (64 * 1024)
260#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
261#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
262#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
263#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
264#endif
265
266#endif
267
