1/* 2 * U-Boot - Configuration file for CM-BF561 board 3 */ 4 5#ifndef __CONFIG_CM_BF561_H__ 6#define __CONFIG_CM_BF561_H__ 7 8#include <asm/config-pre.h> 9 10/* 11 * Processor Settings 12 */ 13#define CONFIG_BFIN_CPU bf561-0.3 14#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA 15 16/* 17 * Clock Settings 18 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV 19 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV 20 */ 21/* CONFIG_CLKIN_HZ is any value in Hz */ 22#define CONFIG_CLKIN_HZ 25000000 23/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ 24/* 1 = CLKIN / 2 */ 25#define CONFIG_CLKIN_HALF 0 26/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ 27/* 1 = bypass PLL */ 28#define CONFIG_PLL_BYPASS 0 29/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ 30/* Values can range from 0-63 (where 0 means 64) */ 31#define CONFIG_VCO_MULT 20 32/* CCLK_DIV controls the core clock divider */ 33/* Values can be 1, 2, 4, or 8 ONLY */ 34#define CONFIG_CCLK_DIV 1 35/* SCLK_DIV controls the system clock divider */ 36/* Values can range from 1-15 */ 37#define CONFIG_SCLK_DIV 5 38 39/* Decrease core voltage */ 40#define CONFIG_VR_CTL_VAL (VLEV_110 | GAIN_20 | FREQ_1000) 41 42/* 43 * Memory Settings 44 */ 45#define CONFIG_MEM_ADD_WDTH 9 46#define CONFIG_MEM_SIZE 64 47 48#define CONFIG_EBIU_SDRRC_VAL ((((CONFIG_SCLK_HZ / 1000) * 64) / 4096) - (7 + 2)) 49#define CONFIG_EBIU_SDGCTL_VAL (SCTLE | PSS | TWR_2 | TRCD_2 | TRP_2 | TRAS_7 | PASR_ALL | CL_3) 50 51#define CONFIG_EBIU_AMGCTL_VAL (CDPRIO | B3_PEN | B2_PEN | B1_PEN | B0_PEN | AMBEN_ALL | AMCKEN) 52#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) 53#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) 54 55#define CONFIG_SYS_MONITOR_LEN (256 * 1024) 56#define CONFIG_SYS_MALLOC_LEN (128 * 1024) 57 58/* 59 * Network Settings 60 */ 61#define ADI_CMDS_NETWORK 1 62#define CONFIG_SMC911X 1 63#define CONFIG_SMC911X_BASE 0x24008000 /* AMS1 */ 64#define CONFIG_SMC911X_16_BIT 65#define CONFIG_HOSTNAME cm-bf561 66 67/* 68 * Flash Settings 69 */ 70#define CONFIG_FLASH_CFI_DRIVER 71#define CONFIG_SYS_FLASH_BASE 0x20000000 72#define CONFIG_SYS_FLASH_CFI 73#define CONFIG_SYS_FLASH_PROTECTION 74#define CONFIG_SYS_MAX_FLASH_BANKS 1 75#define CONFIG_SYS_MAX_FLASH_SECT 67 76 77/* 78 * Env Storage Settings 79 */ 80#define CONFIG_ENV_IS_IN_FLASH 1 81#define CONFIG_ENV_OFFSET 0x20000 82#define CONFIG_ENV_SECT_SIZE 0x20000 83#define CONFIG_ENV_SIZE 0x10000 84#define CONFIG_ENV_IS_EMBEDDED_IN_LDR 85 86/* 87 * Misc Settings 88 */ 89#define CONFIG_BAUDRATE 115200 90#define CONFIG_UART_CONSOLE 0 91#define CONFIG_BOOTCOMMAND "run flashboot" 92#define FLASHBOOT_ENV_SETTINGS "flashboot=bootm 0x20040000\0" 93 94/* 95 * Pull in common ADI header for remaining command/environment setup 96 */ 97#include <configs/bfin_adi_common.h> 98 99#endif 100