1/* 2 * (C) Copyright 2010 3 * Ilko Iliev <iliev@ronetix.at> 4 * Asen Dimov <dimov@ronetix.at> 5 * Ronetix GmbH <www.ronetix.at> 6 * 7 * (C) Copyright 2007-2008 8 * Stelian Pop <stelian@popies.net> 9 * Lead Tech Design <www.leadtechdesign.com> 10 * 11 * Configuation settings for the PM9G45 board. 12 * 13 * SPDX-License-Identifier: GPL-2.0+ 14 */ 15 16#ifndef __CONFIG_H 17#define __CONFIG_H 18 19/* 20 * SoC must be defined first, before hardware.h is included. 21 * In this case SoC is defined in boards.cfg. 22 */ 23#include <asm/hardware.h> 24 25#define CONFIG_PM9G45 1 /* It's an Ronetix PM9G45 */ 26#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9G45" 27 28#define MACH_TYPE_PM9G45 2672 29#define CONFIG_MACH_TYPE MACH_TYPE_PM9G45 30 31/* ARM asynchronous clock */ 32#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ 33#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 34#define CONFIG_SYS_TEXT_BASE 0x73f00000 35 36#define CONFIG_ARCH_CPU_INIT 37 38#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 39#define CONFIG_SETUP_MEMORY_TAGS 1 40#define CONFIG_INITRD_TAG 1 41 42#define CONFIG_SKIP_LOWLEVEL_INIT 43#define CONFIG_BOARD_EARLY_INIT_F 44 45/* 46 * Hardware drivers 47 */ 48#define CONFIG_AT91_GPIO 1 49#define CONFIG_ATMEL_USART 1 50#define CONFIG_USART_BASE ATMEL_BASE_DBGU 51#define CONFIG_USART_ID ATMEL_ID_SYS 52 53#define CONFIG_SYS_USE_NANDFLASH 1 54 55/* LED */ 56#define CONFIG_AT91_LED 57#define CONFIG_RED_LED GPIO_PIN_PD(31) /* this is the user1 led */ 58#define CONFIG_GREEN_LED GPIO_PIN_PD(0) /* this is the user2 led */ 59 60 61/* 62 * BOOTP options 63 */ 64#define CONFIG_BOOTP_BOOTFILESIZE 1 65#define CONFIG_BOOTP_BOOTPATH 1 66#define CONFIG_BOOTP_GATEWAY 1 67#define CONFIG_BOOTP_HOSTNAME 1 68 69/* 70 * Command line configuration. 71 */ 72#define CONFIG_CMD_NAND 1 73 74#define CONFIG_CMD_JFFS2 1 75#define CONFIG_JFFS2_CMDLINE 1 76#define CONFIG_JFFS2_NAND 1 77#define CONFIG_JFFS2_DEV "nand0" /* NAND dev jffs2 lives on */ 78#define CONFIG_JFFS2_PART_OFFSET 0 /* start of jffs2 partition */ 79#define CONFIG_JFFS2_PART_SIZE (256 * 1024 * 1024) /* partition */ 80 81/* SDRAM */ 82#define CONFIG_NR_DRAM_BANKS 1 83#define PHYS_SDRAM 0x70000000 84#define PHYS_SDRAM_SIZE 0x08000000 /* 128 megs */ 85 86/* NOR flash, not available */ 87#define CONFIG_SYS_NO_FLASH 1 88 89/* NAND flash */ 90#ifdef CONFIG_CMD_NAND 91#define CONFIG_NAND_ATMEL 92#define CONFIG_SYS_MAX_NAND_DEVICE 1 93#define CONFIG_SYS_NAND_BASE 0x40000000 94#define CONFIG_SYS_NAND_DBW_8 1 95/* our ALE is AD21 */ 96#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 97/* our CLE is AD22 */ 98#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 99#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PC(14) 100#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(3) 101 102#endif 103 104/* Ethernet */ 105#define CONFIG_MACB 1 106#define CONFIG_RMII 1 107#define CONFIG_NET_RETRY_COUNT 20 108#define CONFIG_RESET_PHY_R 1 109 110/* USB */ 111#define CONFIG_USB_ATMEL 112#define CONFIG_USB_ATMEL_CLK_SEL_UPLL 113#define CONFIG_USB_OHCI_NEW 1 114#define CONFIG_DOS_PARTITION 1 115#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 116#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* _UHP_OHCI_BASE */ 117#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g45" 118#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 119 120/* board specific(not enough SRAM) */ 121#define CONFIG_AT91SAM9G45_LCD_BASE PHYS_SDRAM + 0xE00000 122 123#define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM + 0x2000000 /* load addr */ 124 125#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 126#define CONFIG_SYS_MEMTEST_END CONFIG_AT91SAM9G45_LCD_BASE 127 128/* bootstrap + u-boot + env + linux in nandflash */ 129#define CONFIG_ENV_IS_IN_NAND 1 130#define CONFIG_ENV_OFFSET 0x60000 131#define CONFIG_ENV_OFFSET_REDUND 0x80000 132#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 133#define CONFIG_BOOTCOMMAND "nand read 0x72000000 0x200000 0x200000; bootm" 134#define CONFIG_BOOTARGS "fbcon=rotate:3 console=tty0 " \ 135 "console=ttyS0,115200 " \ 136 "root=/dev/mtdblock4 " \ 137 "mtdparts=atmel_nand:128k(bootstrap)ro," \ 138 "256k(uboot)ro,1664k(env)," \ 139 "2M(linux)ro,-(root) rw " \ 140 "rootfstype=jffs2" 141 142#define CONFIG_BAUDRATE 115200 143 144#define CONFIG_SYS_CBSIZE 256 145#define CONFIG_SYS_MAXARGS 16 146#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 147 sizeof(CONFIG_SYS_PROMPT) + 16) 148#define CONFIG_SYS_LONGHELP 1 149#define CONFIG_CMDLINE_EDITING 1 150#define CONFIG_AUTO_COMPLETE 151 152/* 153 * Size of malloc() pool 154 */ 155#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024,\ 156 0x1000) 157 158#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 159#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ 160 GENERATED_GBL_DATA_SIZE) 161 162#endif 163