1/* 2 * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9_smc.h] 3 * 4 * Copyright (C) 2007 Andrew Victor 5 * Copyright (C) 2007 Atmel Corporation. 6 * 7 * Static Memory Controllers (SMC) - System peripherals registers. 8 * Based on AT91SAM9261 datasheet revision D. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13#ifndef AT91SAM9_SMC_H 14#define AT91SAM9_SMC_H 15 16#ifdef __ASSEMBLY__ 17 18#ifndef ATMEL_BASE_SMC 19#define ATMEL_BASE_SMC ATMEL_BASE_SMC0 20#endif 21 22#define AT91_ASM_SMC_SETUP0 ATMEL_BASE_SMC 23#define AT91_ASM_SMC_PULSE0 (ATMEL_BASE_SMC + 0x04) 24#define AT91_ASM_SMC_CYCLE0 (ATMEL_BASE_SMC + 0x08) 25#define AT91_ASM_SMC_MODE0 (ATMEL_BASE_SMC + 0x0C) 26 27#else 28 29typedef struct at91_cs { 30 u32 setup; /* 0x00 SMC Setup Register */ 31 u32 pulse; /* 0x04 SMC Pulse Register */ 32 u32 cycle; /* 0x08 SMC Cycle Register */ 33 u32 mode; /* 0x0C SMC Mode Register */ 34} at91_cs_t; 35 36typedef struct at91_smc { 37 at91_cs_t cs[8]; 38} at91_smc_t; 39 40#endif /* __ASSEMBLY__ */ 41 42#define AT91_SMC_SETUP_NWE(x) (x & 0x3f) 43#define AT91_SMC_SETUP_NCS_WR(x) ((x & 0x3f) << 8) 44#define AT91_SMC_SETUP_NRD(x) ((x & 0x3f) << 16) 45#define AT91_SMC_SETUP_NCS_RD(x) ((x & 0x3f) << 24) 46 47#define AT91_SMC_PULSE_NWE(x) (x & 0x7f) 48#define AT91_SMC_PULSE_NCS_WR(x) ((x & 0x7f) << 8) 49#define AT91_SMC_PULSE_NRD(x) ((x & 0x7f) << 16) 50#define AT91_SMC_PULSE_NCS_RD(x) ((x & 0x7f) << 24) 51 52#define AT91_SMC_CYCLE_NWE(x) (x & 0x1ff) 53#define AT91_SMC_CYCLE_NRD(x) ((x & 0x1ff) << 16) 54 55#define AT91_SMC_MODE_RM_NCS 0x00000000 56#define AT91_SMC_MODE_RM_NRD 0x00000001 57#define AT91_SMC_MODE_WM_NCS 0x00000000 58#define AT91_SMC_MODE_WM_NWE 0x00000002 59 60#define AT91_SMC_MODE_EXNW_DISABLE 0x00000000 61#define AT91_SMC_MODE_EXNW_FROZEN 0x00000020 62#define AT91_SMC_MODE_EXNW_READY 0x00000030 63 64#define AT91_SMC_MODE_BAT 0x00000100 65#define AT91_SMC_MODE_DBW_8 0x00000000 66#define AT91_SMC_MODE_DBW_16 0x00001000 67#define AT91_SMC_MODE_DBW_32 0x00002000 68#define AT91_SMC_MODE_TDF_CYCLE(x) ((x & 0xf) << 16) 69#define AT91_SMC_MODE_TDF 0x00100000 70#define AT91_SMC_MODE_PMEN 0x01000000 71#define AT91_SMC_MODE_PS_4 0x00000000 72#define AT91_SMC_MODE_PS_8 0x10000000 73#define AT91_SMC_MODE_PS_16 0x20000000 74#define AT91_SMC_MODE_PS_32 0x30000000 75 76#endif 77