1/* 2 * Copyright 2004,2009-2011 Freescale Semiconductor, Inc. 3 * Jeff Brown 4 * Srikanth Srinivasan (srikanth.srinivasan@freescale.com) 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9/* 10 * cpu_init.c - low level cpu init 11 */ 12 13#include <config.h> 14#include <common.h> 15#include <mpc86xx.h> 16#include <asm/mmu.h> 17#include <asm/fsl_law.h> 18#include <asm/fsl_serdes.h> 19#include <asm/mp.h> 20 21extern void srio_init(void); 22 23DECLARE_GLOBAL_DATA_PTR; 24 25/* 26 * Breathe some life into the CPU... 27 * 28 * Set up the memory map 29 * initialize a bunch of registers 30 */ 31 32void cpu_init_f(void) 33{ 34 /* Pointer is writable since we allocated a register for it */ 35 gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); 36 37 /* Clear initial global data */ 38 memset ((void *) gd, 0, sizeof (gd_t)); 39 40#ifdef CONFIG_FSL_LAW 41 init_laws(); 42#endif 43 44 setup_bats(); 45 46 init_early_memctl_regs(); 47 48#if defined(CONFIG_FSL_DMA) 49 dma_init(); 50#endif 51 52 /* enable the timebase bit in HID0 */ 53 set_hid0(get_hid0() | 0x4000000); 54 55 /* enable EMCP, SYNCBE | ABE bits in HID1 */ 56 set_hid1(get_hid1() | 0x80000C00); 57} 58 59/* 60 * initialize higher level parts of CPU like timers 61 */ 62int cpu_init_r(void) 63{ 64 /* needs to be in ram since code uses global static vars */ 65 fsl_serdes_init(); 66 67#ifdef CONFIG_SYS_SRIO 68 srio_init(); 69#endif 70 71#if defined(CONFIG_MP) 72 setup_mp(); 73#endif 74 return 0; 75} 76 77#ifdef CONFIG_ADDR_MAP 78/* Initialize address mapping array */ 79void init_addr_map(void) 80{ 81 int i; 82 ppc_bat_t bat = DBAT0; 83 phys_size_t size; 84 unsigned long upper, lower; 85 86 for (i = 0; i < CONFIG_SYS_NUM_ADDR_MAP; i++, bat++) { 87 if (read_bat(bat, &upper, &lower) != -1) { 88 if (!BATU_VALID(upper)) 89 size = 0; 90 else 91 size = BATU_SIZE(upper); 92 addrmap_set_entry(BATU_VADDR(upper), BATL_PADDR(lower), 93 size, i); 94 } 95#ifdef CONFIG_HIGH_BATS 96 /* High bats are not contiguous with low BAT numbers */ 97 if (bat == DBAT3) 98 bat = DBAT4 - 1; 99#endif 100 } 101} 102#endif 103