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12#include <common.h>
13#include <command.h>
14
15#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260)
16
17#if defined(CONFIG_8xx)
18#include <asm/8xx_immap.h>
19#include <commproc.h>
20#include <asm/iopin_8xx.h>
21#elif defined(CONFIG_MPC8260)
22#include <asm/immap_8260.h>
23#include <asm/cpm_8260.h>
24#include <asm/iopin_8260.h>
25#endif
26
27DECLARE_GLOBAL_DATA_PTR;
28
29static void
30unimplemented ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
31{
32 printf ("Sorry, but the '%s' command has not been implemented\n",
33 cmdtp->name);
34}
35
36int
37do_siuinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
38{
39 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
40
41#if defined(CONFIG_8xx)
42 volatile sysconf8xx_t *sc = &immap->im_siu_conf;
43#elif defined(CONFIG_MPC8260)
44 volatile sysconf8260_t *sc = &immap->im_siu_conf;
45#endif
46
47 printf ("SIUMCR= %08x SYPCR = %08x\n", sc->sc_siumcr, sc->sc_sypcr);
48#if defined(CONFIG_8xx)
49 printf ("SWT = %08x\n", sc->sc_swt);
50 printf ("SIPEND= %08x SIMASK= %08x\n", sc->sc_sipend, sc->sc_simask);
51 printf ("SIEL = %08x SIVEC = %08x\n", sc->sc_siel, sc->sc_sivec);
52 printf ("TESR = %08x SDCR = %08x\n", sc->sc_tesr, sc->sc_sdcr);
53#elif defined(CONFIG_MPC8260)
54 printf ("BCR = %08x\n", sc->sc_bcr);
55 printf ("P_ACR = %02x P_ALRH= %08x P_ALRL= %08x\n",
56 sc->sc_ppc_acr, sc->sc_ppc_alrh, sc->sc_ppc_alrl);
57 printf ("L_ACR = %02x L_ALRH= %08x L_ALRL= %08x\n",
58 sc->sc_lcl_acr, sc->sc_lcl_alrh, sc->sc_lcl_alrl);
59 printf ("PTESR1= %08x PTESR2= %08x\n", sc->sc_tescr1, sc->sc_tescr2);
60 printf ("LTESR1= %08x LTESR2= %08x\n", sc->sc_ltescr1, sc->sc_ltescr2);
61 printf ("PDTEA = %08x PDTEM = %02x\n", sc->sc_pdtea, sc->sc_pdtem);
62 printf ("LDTEA = %08x LDTEM = %02x\n", sc->sc_ldtea, sc->sc_ldtem);
63#endif
64 return 0;
65}
66
67int
68do_memcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
69{
70 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
71
72#if defined(CONFIG_8xx)
73 volatile memctl8xx_t *memctl = &immap->im_memctl;
74 int nbanks = 8;
75#elif defined(CONFIG_MPC8260)
76 volatile memctl8260_t *memctl = &immap->im_memctl;
77 int nbanks = 12;
78#endif
79 volatile uint *p = &memctl->memc_br0;
80 int i;
81
82 for (i = 0; i < nbanks; i++, p += 2) {
83 if (i < 10) {
84 printf ("BR%d = %08x OR%d = %08x\n",
85 i, p[0], i, p[1]);
86 } else {
87 printf ("BR%d = %08x OR%d = %08x\n",
88 i, p[0], i, p[1]);
89 }
90 }
91
92 printf ("MAR = %08x", memctl->memc_mar);
93#if defined(CONFIG_8xx)
94 printf (" MCR = %08x\n", memctl->memc_mcr);
95#elif defined(CONFIG_MPC8260)
96 putc ('\n');
97#endif
98 printf ("MAMR = %08x MBMR = %08x",
99 memctl->memc_mamr, memctl->memc_mbmr);
100#if defined(CONFIG_8xx)
101 printf ("\nMSTAT = %04x\n", memctl->memc_mstat);
102#elif defined(CONFIG_MPC8260)
103 printf (" MCMR = %08x\n", memctl->memc_mcmr);
104#endif
105 printf ("MPTPR = %04x MDR = %08x\n",
106 memctl->memc_mptpr, memctl->memc_mdr);
107#if defined(CONFIG_MPC8260)
108 printf ("PSDMR = %08x LSDMR = %08x\n",
109 memctl->memc_psdmr, memctl->memc_lsdmr);
110 printf ("PURT = %02x PSRT = %02x\n",
111 memctl->memc_purt, memctl->memc_psrt);
112 printf ("LURT = %02x LSRT = %02x\n",
113 memctl->memc_lurt, memctl->memc_lsrt);
114 printf ("IMMR = %08x\n", memctl->memc_immr);
115#endif
116 return 0;
117}
118
119int
120do_sitinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
121{
122 unimplemented (cmdtp, flag, argc, argv);
123 return 0;
124}
125
126#ifdef CONFIG_MPC8260
127int
128do_icinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
129{
130 unimplemented (cmdtp, flag, argc, argv);
131 return 0;
132}
133#endif
134
135int
136do_carinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
137{
138 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
139
140#if defined(CONFIG_8xx)
141 volatile car8xx_t *car = &immap->im_clkrst;
142#elif defined(CONFIG_MPC8260)
143 volatile car8260_t *car = &immap->im_clkrst;
144#endif
145
146#if defined(CONFIG_8xx)
147 printf ("SCCR = %08x\n", car->car_sccr);
148 printf ("PLPRCR= %08x\n", car->car_plprcr);
149 printf ("RSR = %08x\n", car->car_rsr);
150#elif defined(CONFIG_MPC8260)
151 printf ("SCCR = %08x\n", car->car_sccr);
152 printf ("SCMR = %08x\n", car->car_scmr);
153 printf ("RSR = %08x\n", car->car_rsr);
154 printf ("RMR = %08x\n", car->car_rmr);
155#endif
156 return 0;
157}
158
159static int counter;
160
161static void
162header(void)
163{
164 char *data = "\
165 -------------------------------- --------------------------------\
166 00000000001111111111222222222233 00000000001111111111222222222233\
167 01234567890123456789012345678901 01234567890123456789012345678901\
168 -------------------------------- --------------------------------\
169 ";
170 int i;
171
172 if (counter % 2)
173 putc('\n');
174 counter = 0;
175
176 for (i = 0; i < 4; i++, data += 79)
177 printf("%.79s\n", data);
178}
179
180static void binary (char *label, uint value, int nbits)
181{
182 uint mask = 1 << (nbits - 1);
183 int i, second = (counter++ % 2);
184
185 if (second)
186 putc (' ');
187 puts (label);
188 for (i = 32 + 1; i != nbits; i--)
189 putc (' ');
190
191 while (mask != 0) {
192 if (value & mask)
193 putc ('1');
194 else
195 putc ('0');
196 mask >>= 1;
197 }
198
199 if (second)
200 putc ('\n');
201}
202
203#if defined(CONFIG_8xx)
204#define PA_NBITS 16
205#define PA_NB_ODR 8
206#define PB_NBITS 18
207#define PB_NB_ODR 16
208#define PC_NBITS 12
209#define PD_NBITS 13
210#elif defined(CONFIG_MPC8260)
211#define PA_NBITS 32
212#define PA_NB_ODR 32
213#define PB_NBITS 28
214#define PB_NB_ODR 28
215#define PC_NBITS 32
216#define PD_NBITS 28
217#endif
218
219int
220do_iopinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
221{
222 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
223
224#if defined(CONFIG_8xx)
225 volatile iop8xx_t *iop = &immap->im_ioport;
226 volatile ushort *l, *r;
227#elif defined(CONFIG_MPC8260)
228 volatile iop8260_t *iop = &immap->im_ioport;
229 volatile uint *l, *r;
230#endif
231 volatile uint *R;
232
233 counter = 0;
234 header ();
235
236
237
238
239
240#if defined(CONFIG_8xx)
241 l = &iop->iop_padir;
242 R = &immap->im_cpm.cp_pbdir;
243#elif defined(CONFIG_MPC8260)
244 l = &iop->iop_pdira;
245 R = &iop->iop_pdirb;
246#endif
247 binary ("PA_DIR", *l++, PA_NBITS);
248 binary ("PB_DIR", *R++, PB_NBITS);
249 binary ("PA_PAR", *l++, PA_NBITS);
250 binary ("PB_PAR", *R++, PB_NBITS);
251#if defined(CONFIG_MPC8260)
252 binary ("PA_SOR", *l++, PA_NBITS);
253 binary ("PB_SOR", *R++, PB_NBITS);
254#endif
255 binary ("PA_ODR", *l++, PA_NB_ODR);
256 binary ("PB_ODR", *R++, PB_NB_ODR);
257 binary ("PA_DAT", *l++, PA_NBITS);
258 binary ("PB_DAT", *R++, PB_NBITS);
259
260 header ();
261
262
263
264
265
266#if defined(CONFIG_8xx)
267 l = &iop->iop_pcdir;
268 r = &iop->iop_pddir;
269#elif defined(CONFIG_MPC8260)
270 l = &iop->iop_pdirc;
271 r = &iop->iop_pdird;
272#endif
273 binary ("PC_DIR", *l++, PC_NBITS);
274 binary ("PD_DIR", *r++, PD_NBITS);
275 binary ("PC_PAR", *l++, PC_NBITS);
276 binary ("PD_PAR", *r++, PD_NBITS);
277#if defined(CONFIG_8xx)
278 binary ("PC_SO ", *l++, PC_NBITS);
279 binary (" ", 0, 0);
280 r++;
281#elif defined(CONFIG_MPC8260)
282 binary ("PC_SOR", *l++, PC_NBITS);
283 binary ("PD_SOR", *r++, PD_NBITS);
284 binary ("PC_ODR", *l++, PC_NBITS);
285 binary ("PD_ODR", *r++, PD_NBITS);
286#endif
287 binary ("PC_DAT", *l++, PC_NBITS);
288 binary ("PD_DAT", *r++, PD_NBITS);
289#if defined(CONFIG_8xx)
290 binary ("PC_INT", *l++, PC_NBITS);
291#endif
292
293 header ();
294 return 0;
295}
296
297
298
299
300
301
302int
303do_iopset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
304{
305 uint rcode = 0;
306 iopin_t iopin;
307 static uint port = 0;
308 static uint pin = 0;
309 static uint value = 0;
310 static enum {
311 DIR,
312 PAR,
313 SOR,
314 ODR,
315 DAT,
316#if defined(CONFIG_8xx)
317 INT
318#endif
319 } cmd = DAT;
320
321 if (argc != 5) {
322 puts ("iopset PORT PIN CMD VALUE\n");
323 return 1;
324 }
325 port = argv[1][0] - 'A';
326 if (port > 3)
327 port -= 0x20;
328 if (port > 3)
329 rcode = 1;
330 pin = simple_strtol (argv[2], NULL, 10);
331 if (pin > 31)
332 rcode = 1;
333
334
335 switch (argv[3][0]) {
336 case 'd':
337 if (argv[3][1] == 'a')
338 cmd = DAT;
339 else if (argv[3][1] == 'i')
340 cmd = DIR;
341 else
342 rcode = 1;
343 break;
344 case 'p':
345 cmd = PAR;
346 break;
347 case 'o':
348 cmd = ODR;
349 break;
350 case 's':
351 cmd = SOR;
352 break;
353#if defined(CONFIG_8xx)
354 case 'i':
355 cmd = INT;
356 break;
357#endif
358 default:
359 printf ("iopset: unknown command %s\n", argv[3]);
360 rcode = 1;
361 }
362 if (argv[4][0] == '1')
363 value = 1;
364 else if (argv[4][0] == '0')
365 value = 0;
366 else
367 rcode = 1;
368 if (rcode == 0) {
369 iopin.port = port;
370 iopin.pin = pin;
371 iopin.flag = 0;
372 switch (cmd) {
373 case DIR:
374 if (value)
375 iopin_set_out (&iopin);
376 else
377 iopin_set_in (&iopin);
378 break;
379 case PAR:
380 if (value)
381 iopin_set_ded (&iopin);
382 else
383 iopin_set_gen (&iopin);
384 break;
385 case SOR:
386 if (value)
387 iopin_set_opt2 (&iopin);
388 else
389 iopin_set_opt1 (&iopin);
390 break;
391 case ODR:
392 if (value)
393 iopin_set_odr (&iopin);
394 else
395 iopin_set_act (&iopin);
396 break;
397 case DAT:
398 if (value)
399 iopin_set_high (&iopin);
400 else
401 iopin_set_low (&iopin);
402 break;
403#if defined(CONFIG_8xx)
404 case INT:
405 if (value)
406 iopin_set_falledge (&iopin);
407 else
408 iopin_set_anyedge (&iopin);
409 break;
410#endif
411 }
412
413 }
414 return rcode;
415}
416
417int
418do_dmainfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
419{
420 unimplemented (cmdtp, flag, argc, argv);
421 return 0;
422}
423
424int
425do_fccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
426{
427 unimplemented (cmdtp, flag, argc, argv);
428 return 0;
429}
430
431static void prbrg (int n, uint val)
432{
433 uint extc = (val >> 14) & 3;
434 uint cd = (val & CPM_BRG_CD_MASK) >> 1;
435 uint div16 = (val & CPM_BRG_DIV16) != 0;
436
437#if defined(CONFIG_8xx)
438 ulong clock = gd->cpu_clk;
439#elif defined(CONFIG_MPC8260)
440 ulong clock = gd->arch.brg_clk;
441#endif
442
443 printf ("BRG%d:", n);
444
445 if (val & CPM_BRG_RST)
446 puts (" RESET");
447 else
448 puts (" ");
449
450 if (val & CPM_BRG_EN)
451 puts (" ENABLED");
452 else
453 puts (" DISABLED");
454
455 printf (" EXTC=%d", extc);
456
457 if (val & CPM_BRG_ATB)
458 puts (" ATB");
459 else
460 puts (" ");
461
462 printf (" DIVIDER=%4d", cd);
463 if (extc == 0 && cd != 0) {
464 uint baudrate;
465
466 if (div16)
467 baudrate = (clock / 16) / (cd + 1);
468 else
469 baudrate = clock / (cd + 1);
470
471 printf ("=%6d bps", baudrate);
472 } else {
473 puts (" ");
474 }
475
476 if (val & CPM_BRG_DIV16)
477 puts (" DIV16");
478 else
479 puts (" ");
480
481 putc ('\n');
482}
483
484int
485do_brginfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
486{
487 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
488
489#if defined(CONFIG_8xx)
490 volatile cpm8xx_t *cp = &immap->im_cpm;
491 volatile uint *p = &cp->cp_brgc1;
492#elif defined(CONFIG_MPC8260)
493 volatile uint *p = &immap->im_brgc1;
494#endif
495 int i = 1;
496
497 while (i <= 4)
498 prbrg (i++, *p++);
499
500#if defined(CONFIG_MPC8260)
501 p = &immap->im_brgc5;
502 while (i <= 8)
503 prbrg (i++, *p++);
504#endif
505 return 0;
506}
507
508int
509do_i2cinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
510{
511 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
512
513#if defined(CONFIG_8xx)
514 volatile i2c8xx_t *i2c = &immap->im_i2c;
515 volatile cpm8xx_t *cp = &immap->im_cpm;
516 volatile iic_t *iip = (iic_t *) & cp->cp_dparam[PROFF_IIC];
517#elif defined(CONFIG_MPC8260)
518 volatile i2c8260_t *i2c = &immap->im_i2c;
519 volatile iic_t *iip;
520 uint dpaddr;
521
522 dpaddr = immap->im_dprambase16[PROFF_I2C_BASE / sizeof(u16)];
523 if (dpaddr == 0)
524 iip = NULL;
525 else
526 iip = (iic_t *) & immap->im_dprambase[dpaddr];
527#endif
528
529 printf ("I2MOD = %02x I2ADD = %02x\n", i2c->i2c_i2mod, i2c->i2c_i2add);
530 printf ("I2BRG = %02x I2COM = %02x\n", i2c->i2c_i2brg, i2c->i2c_i2com);
531 printf ("I2CER = %02x I2CMR = %02x\n", i2c->i2c_i2cer, i2c->i2c_i2cmr);
532
533 if (iip == NULL)
534 puts ("i2c parameter ram not allocated\n");
535 else {
536 printf ("RBASE = %08x TBASE = %08x\n",
537 iip->iic_rbase, iip->iic_tbase);
538 printf ("RFCR = %02x TFCR = %02x\n",
539 iip->iic_rfcr, iip->iic_tfcr);
540 printf ("MRBLR = %04x\n", iip->iic_mrblr);
541 printf ("RSTATE= %08x RDP = %08x\n",
542 iip->iic_rstate, iip->iic_rdp);
543 printf ("RBPTR = %04x RBC = %04x\n",
544 iip->iic_rbptr, iip->iic_rbc);
545 printf ("RXTMP = %08x\n", iip->iic_rxtmp);
546 printf ("TSTATE= %08x TDP = %08x\n",
547 iip->iic_tstate, iip->iic_tdp);
548 printf ("TBPTR = %04x TBC = %04x\n",
549 iip->iic_tbptr, iip->iic_tbc);
550 printf ("TXTMP = %08x\n", iip->iic_txtmp);
551 }
552 return 0;
553}
554
555int
556do_sccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
557{
558 unimplemented (cmdtp, flag, argc, argv);
559 return 0;
560}
561
562int
563do_smcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
564{
565 unimplemented (cmdtp, flag, argc, argv);
566 return 0;
567}
568
569int
570do_spiinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
571{
572 unimplemented (cmdtp, flag, argc, argv);
573 return 0;
574}
575
576int
577do_muxinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
578{
579 unimplemented (cmdtp, flag, argc, argv);
580 return 0;
581}
582
583int
584do_siinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
585{
586 unimplemented (cmdtp, flag, argc, argv);
587 return 0;
588}
589
590int
591do_mccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
592{
593 unimplemented (cmdtp, flag, argc, argv);
594 return 0;
595}
596
597
598
599U_BOOT_CMD(
600 siuinfo, 1, 1, do_siuinfo,
601 "print System Interface Unit (SIU) registers",
602 ""
603);
604
605U_BOOT_CMD(
606 memcinfo, 1, 1, do_memcinfo,
607 "print Memory Controller registers",
608 ""
609);
610
611U_BOOT_CMD(
612 sitinfo, 1, 1, do_sitinfo,
613 "print System Integration Timers (SIT) registers",
614 ""
615);
616
617#ifdef CONFIG_MPC8260
618U_BOOT_CMD(
619 icinfo, 1, 1, do_icinfo,
620 "print Interrupt Controller registers",
621 ""
622);
623#endif
624
625U_BOOT_CMD(
626 carinfo, 1, 1, do_carinfo,
627 "print Clocks and Reset registers",
628 ""
629);
630
631U_BOOT_CMD(
632 iopinfo, 1, 1, do_iopinfo,
633 "print I/O Port registers",
634 ""
635);
636
637U_BOOT_CMD(
638 iopset, 5, 0, do_iopset,
639 "set I/O Port registers",
640 "PORT PIN CMD VALUE\nPORT: A-D, PIN: 0-31, CMD: [dat|dir|odr|sor], VALUE: 0|1"
641);
642
643U_BOOT_CMD(
644 dmainfo, 1, 1, do_dmainfo,
645 "print SDMA/IDMA registers",
646 ""
647);
648
649U_BOOT_CMD(
650 fccinfo, 1, 1, do_fccinfo,
651 "print FCC registers",
652 ""
653);
654
655U_BOOT_CMD(
656 brginfo, 1, 1, do_brginfo,
657 "print Baud Rate Generator (BRG) registers",
658 ""
659);
660
661U_BOOT_CMD(
662 i2cinfo, 1, 1, do_i2cinfo,
663 "print I2C registers",
664 ""
665);
666
667U_BOOT_CMD(
668 sccinfo, 1, 1, do_sccinfo,
669 "print SCC registers",
670 ""
671);
672
673U_BOOT_CMD(
674 smcinfo, 1, 1, do_smcinfo,
675 "print SMC registers",
676 ""
677);
678
679U_BOOT_CMD(
680 spiinfo, 1, 1, do_spiinfo,
681 "print Serial Peripheral Interface (SPI) registers",
682 ""
683);
684
685U_BOOT_CMD(
686 muxinfo, 1, 1, do_muxinfo,
687 "print CPM Multiplexing registers",
688 ""
689);
690
691U_BOOT_CMD(
692 siinfo, 1, 1, do_siinfo,
693 "print Serial Interface (SI) registers",
694 ""
695);
696
697U_BOOT_CMD(
698 mccinfo, 1, 1, do_mccinfo,
699 "print MCC registers",
700 ""
701);
702
703#endif
704
