1
2
3
4
5
6
7
8#include <common.h>
9#include <dm.h>
10#include <errno.h>
11#include <asm/io.h>
12#include <dm/pinctrl.h>
13#include <mach/pic32.h>
14
15DECLARE_GLOBAL_DATA_PTR;
16
17
18
19
20enum {
21 PIC32_PORT_A = 0,
22 PIC32_PORT_B = 1,
23 PIC32_PORT_C = 2,
24 PIC32_PORT_D = 3,
25 PIC32_PORT_E = 4,
26 PIC32_PORT_F = 5,
27 PIC32_PORT_G = 6,
28 PIC32_PORT_H = 7,
29 PIC32_PORT_J = 8,
30 PIC32_PORT_K = 9,
31 PIC32_PINS_PER_PORT = 16,
32};
33
34#define PIN_CONFIG_PIC32_DIGITAL (PIN_CONFIG_END + 1)
35#define PIN_CONFIG_PIC32_ANALOG (PIN_CONFIG_END + 2)
36
37
38struct pic32_pin_config {
39 u16 port;
40 u16 pin;
41 u32 config;
42};
43#define PIN_CONFIG(_prt, _pin, _cfg) \
44 {.port = (_prt), .pin = (_pin), .config = (_cfg), }
45
46
47
48
49
50
51
52struct pic32_reg_port {
53 struct pic32_reg_atomic ansel;
54 struct pic32_reg_atomic tris;
55 struct pic32_reg_atomic port;
56 struct pic32_reg_atomic lat;
57 struct pic32_reg_atomic odc;
58 struct pic32_reg_atomic cnpu;
59 struct pic32_reg_atomic cnpd;
60 struct pic32_reg_atomic cncon;
61 struct pic32_reg_atomic unused[8];
62};
63
64
65struct pic32_reg_in_mux {
66 u32 unused0;
67 u32 int1[4];
68 u32 unused1;
69 u32 t2ck[8];
70 u32 ic1[9];
71 u32 unused2;
72 u32 ocfar;
73 u32 unused3;
74 u32 u1rx;
75 u32 u1cts;
76 u32 u2rx;
77 u32 u2cts;
78 u32 u3rx;
79 u32 u3cts;
80 u32 u4rx;
81 u32 u4cts;
82 u32 u5rx;
83 u32 u5cts;
84 u32 u6rx;
85 u32 u6cts;
86 u32 unused4;
87 u32 sdi1;
88 u32 ss1;
89 u32 unused5;
90 u32 sdi2;
91 u32 ss2;
92 u32 unused6;
93 u32 sdi3;
94 u32 ss3;
95 u32 unused7;
96 u32 sdi4;
97 u32 ss4;
98 u32 unused8;
99 u32 sdi5;
100 u32 ss5;
101 u32 unused9;
102 u32 sdi6;
103 u32 ss6;
104 u32 c1rx;
105 u32 c2rx;
106 u32 refclki1;
107 u32 refclki2;
108 u32 refclki3;
109 u32 refclki4;
110};
111
112
113#define PPS_OUT(__port, __pin) \
114 (((__port) * PIC32_PINS_PER_PORT + (__pin)) << 2)
115
116
117struct pic32_pinctrl_priv {
118 struct pic32_reg_in_mux *mux_in;
119 struct pic32_reg_port *pinconf;
120 void __iomem *mux_out;
121};
122
123enum {
124 PERIPH_ID_UART1,
125 PERIPH_ID_UART2,
126 PERIPH_ID_ETH,
127 PERIPH_ID_USB,
128 PERIPH_ID_SDHCI,
129 PERIPH_ID_I2C1,
130 PERIPH_ID_I2C2,
131 PERIPH_ID_SPI1,
132 PERIPH_ID_SPI2,
133 PERIPH_ID_SQI,
134};
135
136static int pic32_pinconfig_one(struct pic32_pinctrl_priv *priv,
137 u32 port_nr, u32 pin, u32 param)
138{
139 struct pic32_reg_port *port;
140
141 port = &priv->pinconf[port_nr];
142 switch (param) {
143 case PIN_CONFIG_PIC32_DIGITAL:
144 writel(BIT(pin), &port->ansel.clr);
145 break;
146 case PIN_CONFIG_PIC32_ANALOG:
147 writel(BIT(pin), &port->ansel.set);
148 break;
149 case PIN_CONFIG_INPUT_ENABLE:
150 writel(BIT(pin), &port->tris.set);
151 break;
152 case PIN_CONFIG_OUTPUT:
153 writel(BIT(pin), &port->tris.clr);
154 break;
155 case PIN_CONFIG_BIAS_PULL_UP:
156 writel(BIT(pin), &port->cnpu.set);
157 break;
158 case PIN_CONFIG_BIAS_PULL_DOWN:
159 writel(BIT(pin), &port->cnpd.set);
160 break;
161 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
162 writel(BIT(pin), &port->odc.set);
163 break;
164 default:
165 break;
166 }
167
168 return 0;
169}
170
171static int pic32_pinconfig_set(struct pic32_pinctrl_priv *priv,
172 const struct pic32_pin_config *list, int count)
173{
174 int i;
175
176 for (i = 0 ; i < count; i++)
177 pic32_pinconfig_one(priv, list[i].port,
178 list[i].pin, list[i].config);
179
180 return 0;
181}
182
183static void pic32_eth_pin_config(struct udevice *dev)
184{
185 struct pic32_pinctrl_priv *priv = dev_get_priv(dev);
186 const struct pic32_pin_config configs[] = {
187
188 PIN_CONFIG(PIC32_PORT_D, 11, PIN_CONFIG_PIC32_DIGITAL),
189 PIN_CONFIG(PIC32_PORT_D, 11, PIN_CONFIG_OUTPUT),
190
191 PIN_CONFIG(PIC32_PORT_D, 6, PIN_CONFIG_PIC32_DIGITAL),
192 PIN_CONFIG(PIC32_PORT_D, 6, PIN_CONFIG_OUTPUT),
193
194 PIN_CONFIG(PIC32_PORT_H, 13, PIN_CONFIG_PIC32_DIGITAL),
195 PIN_CONFIG(PIC32_PORT_H, 13, PIN_CONFIG_INPUT_ENABLE),
196
197 PIN_CONFIG(PIC32_PORT_H, 8, PIN_CONFIG_PIC32_DIGITAL),
198 PIN_CONFIG(PIC32_PORT_H, 8, PIN_CONFIG_INPUT_ENABLE),
199 PIN_CONFIG(PIC32_PORT_H, 8, PIN_CONFIG_BIAS_PULL_DOWN),
200
201 PIN_CONFIG(PIC32_PORT_H, 5, PIN_CONFIG_PIC32_DIGITAL),
202 PIN_CONFIG(PIC32_PORT_H, 5, PIN_CONFIG_INPUT_ENABLE),
203 PIN_CONFIG(PIC32_PORT_H, 5, PIN_CONFIG_BIAS_PULL_DOWN),
204
205 PIN_CONFIG(PIC32_PORT_J, 11, PIN_CONFIG_PIC32_DIGITAL),
206 PIN_CONFIG(PIC32_PORT_J, 11, PIN_CONFIG_INPUT_ENABLE),
207
208 PIN_CONFIG(PIC32_PORT_J, 9, PIN_CONFIG_PIC32_DIGITAL),
209 PIN_CONFIG(PIC32_PORT_J, 9, PIN_CONFIG_OUTPUT),
210
211 PIN_CONFIG(PIC32_PORT_J, 8, PIN_CONFIG_PIC32_DIGITAL),
212 PIN_CONFIG(PIC32_PORT_J, 8, PIN_CONFIG_OUTPUT),
213
214 PIN_CONFIG(PIC32_PORT_J, 1, PIN_CONFIG_PIC32_DIGITAL),
215 PIN_CONFIG(PIC32_PORT_J, 1, PIN_CONFIG_INPUT_ENABLE),
216
217 PIN_CONFIG(PIC32_PORT_F, 3, PIN_CONFIG_PIC32_DIGITAL),
218 PIN_CONFIG(PIC32_PORT_F, 3, PIN_CONFIG_INPUT_ENABLE),
219 };
220
221 pic32_pinconfig_set(priv, configs, ARRAY_SIZE(configs));
222}
223
224static int pic32_pinctrl_request(struct udevice *dev, int func, int flags)
225{
226 struct pic32_pinctrl_priv *priv = dev_get_priv(dev);
227
228 switch (func) {
229 case PERIPH_ID_UART2:
230
231 writel(0x02, priv->mux_out + PPS_OUT(PIC32_PORT_G, 9));
232 writel(0x05, &priv->mux_in->u2rx);
233
234 pic32_pinconfig_one(priv, PIC32_PORT_G, 9,
235 PIN_CONFIG_PIC32_DIGITAL);
236 pic32_pinconfig_one(priv, PIC32_PORT_B, 0,
237 PIN_CONFIG_PIC32_DIGITAL);
238 break;
239 case PERIPH_ID_ETH:
240 pic32_eth_pin_config(dev);
241 break;
242 default:
243 debug("%s: unknown-unhandled case\n", __func__);
244 break;
245 }
246
247 return 0;
248}
249
250static int pic32_pinctrl_get_periph_id(struct udevice *dev,
251 struct udevice *periph)
252{
253 int ret;
254 u32 cell[2];
255
256 ret = fdtdec_get_int_array(gd->fdt_blob, periph->of_offset,
257 "interrupts", cell, ARRAY_SIZE(cell));
258 if (ret < 0)
259 return -EINVAL;
260
261
262 switch (cell[0]) {
263 case 112 ... 114:
264 return PERIPH_ID_UART1;
265 case 145 ... 147:
266 return PERIPH_ID_UART2;
267 case 109 ... 111:
268 return PERIPH_ID_SPI1;
269 case 142 ... 144:
270 return PERIPH_ID_SPI2;
271 case 115 ... 117:
272 return PERIPH_ID_I2C1;
273 case 148 ... 150:
274 return PERIPH_ID_I2C2;
275 case 132 ... 133:
276 return PERIPH_ID_USB;
277 case 169:
278 return PERIPH_ID_SQI;
279 case 191:
280 return PERIPH_ID_SDHCI;
281 case 153:
282 return PERIPH_ID_ETH;
283 default:
284 break;
285 }
286
287 return -ENOENT;
288}
289
290static int pic32_pinctrl_set_state_simple(struct udevice *dev,
291 struct udevice *periph)
292{
293 int func;
294
295 debug("%s: periph %s\n", __func__, periph->name);
296 func = pic32_pinctrl_get_periph_id(dev, periph);
297 if (func < 0)
298 return func;
299 return pic32_pinctrl_request(dev, func, 0);
300}
301
302static struct pinctrl_ops pic32_pinctrl_ops = {
303 .set_state_simple = pic32_pinctrl_set_state_simple,
304 .request = pic32_pinctrl_request,
305 .get_periph_id = pic32_pinctrl_get_periph_id,
306};
307
308static int pic32_pinctrl_probe(struct udevice *dev)
309{
310 struct pic32_pinctrl_priv *priv = dev_get_priv(dev);
311 struct fdt_resource res;
312 void *fdt = (void *)gd->fdt_blob;
313 int node = dev->of_offset;
314 int ret;
315
316 ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",
317 "ppsin", &res);
318 if (ret < 0) {
319 printf("pinctrl: resource \"ppsin\" not found\n");
320 return ret;
321 }
322 priv->mux_in = ioremap(res.start, fdt_resource_size(&res));
323
324 ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",
325 "ppsout", &res);
326 if (ret < 0) {
327 printf("pinctrl: resource \"ppsout\" not found\n");
328 return ret;
329 }
330 priv->mux_out = ioremap(res.start, fdt_resource_size(&res));
331
332 ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",
333 "port", &res);
334 if (ret < 0) {
335 printf("pinctrl: resource \"port\" not found\n");
336 return ret;
337 }
338 priv->pinconf = ioremap(res.start, fdt_resource_size(&res));
339
340 return 0;
341}
342
343static const struct udevice_id pic32_pinctrl_ids[] = {
344 { .compatible = "microchip,pic32mzda-pinctrl" },
345 { }
346};
347
348U_BOOT_DRIVER(pinctrl_pic32) = {
349 .name = "pinctrl_pic32",
350 .id = UCLASS_PINCTRL,
351 .of_match = pic32_pinctrl_ids,
352 .ops = &pic32_pinctrl_ops,
353 .probe = pic32_pinctrl_probe,
354 .bind = dm_scan_fdt_dev,
355 .priv_auto_alloc_size = sizeof(struct pic32_pinctrl_priv),
356};
357
