uboot/include/configs/a3m071.h
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   1/*
   2 * Copyright 2012-2013 Stefan Roese <sr@denx.de>
   3 *
   4 * SPDX-License-Identifier:     GPL-2.0+
   5 */
   6
   7#ifndef __CONFIG_H
   8#define __CONFIG_H
   9
  10/*
  11 * High Level Configuration Options
  12 * (easy to change)
  13 */
  14
  15#define CONFIG_MPC5200
  16#define CONFIG_A3M071                   /* A3M071 board */
  17
  18#define CONFIG_SYS_TEXT_BASE    0x01000000      /* boot low for 32 MiB boards */
  19
  20#define CONFIG_SPL_TARGET       "u-boot-img.bin"
  21
  22#define CONFIG_SYS_MPC5XXX_CLKIN        33000000 /* ... running at 33MHz */
  23
  24#define CONFIG_MISC_INIT_R
  25#define CONFIG_SYS_LOWBOOT              /* Enable lowboot       */
  26
  27#ifdef CONFIG_A4M2K
  28#define CONFIG_HOSTNAME         a4m2k
  29#else
  30#define CONFIG_HOSTNAME         a3m071
  31#endif
  32
  33#define CONFIG_BOOTCOUNT_LIMIT
  34
  35/*
  36 * Serial console configuration
  37 */
  38#define CONFIG_PSC_CONSOLE      1           /* console is on PSC1 */
  39#define CONFIG_BAUDRATE         115200  /* ... at 115200 bps */
  40#define CONFIG_SYS_BAUDRATE_TABLE               \
  41        { 9600, 19200, 38400, 57600, 115200, 230400 }
  42
  43/*
  44 * Command line configuration.
  45 */
  46#define CONFIG_CMD_BSP
  47#define CONFIG_CMD_REGINFO
  48#define CONFIG_BOOTP_SEND_HOSTNAME
  49#define CONFIG_BOOTP_SERVERIP
  50#define CONFIG_BOOTP_MAY_FAIL
  51#define CONFIG_BOOTP_BOOTPATH
  52#define CONFIG_BOOTP_GATEWAY
  53#define CONFIG_BOOTP_SERVERIP
  54#define CONFIG_NET_RETRY_COUNT 3
  55#define CONFIG_NETCONSOLE
  56#define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
  57#define CONFIG_MTD_PARTITIONS   /* needed for UBI */
  58#define CONFIG_FLASH_CFI_MTD
  59#define MTDIDS_DEFAULT          "nor0=fc000000.flash"
  60#define MTDPARTS_DEFAULT        "mtdparts=fc000000.flash:512k(u-boot)," \
  61                                                "128k(env1),"   \
  62                                                "128k(env2),"   \
  63                                                "128k(hwinfo)," \
  64                                                "1M(nvramsim)," \
  65                                                "128k(dtb),"    \
  66                                                "5M(kernel),"   \
  67                                                "128k(sysinfo),"        \
  68                                                "7552k(root),"  \
  69                                                "4M(app),"      \
  70                                                "5376k(data),"  \
  71                                                "8M(install)"
  72
  73#define CONFIG_LZO                      /* needed for UBI */
  74#define CONFIG_RBTREE                   /* needed for UBI */
  75#define CONFIG_CMD_MTDPARTS
  76#define CONFIG_CMD_UBIFS
  77
  78/*
  79 * IPB Bus clocking configuration.
  80 */
  81#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK         /* define for 133MHz speed */
  82/* define for 66MHz speed - undef for 33MHz PCI clock speed */
  83#ifdef CONFIG_A4M2K
  84#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
  85#else
  86#undef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
  87#endif
  88
  89/* maximum size of the flat tree (8K) */
  90#define OF_FLAT_TREE_MAX_SIZE   8192
  91
  92#define OF_CPU                  "PowerPC,5200@0"
  93#define OF_SOC                  "soc5200@f0000000"
  94#define OF_TBCLK                (bd->bi_busfreq / 4)
  95#define OF_STDOUT_PATH          "/soc5200@f0000000/serial@2000"
  96
  97/*
  98 * NOR flash configuration
  99 */
 100#define CONFIG_SYS_FLASH_BASE           0xfc000000
 101#define CONFIG_SYS_FLASH_SIZE           0x02000000
 102#define CONFIG_ENV_ADDR                 (CONFIG_SYS_FLASH_BASE + 0x80000)
 103
 104#define CONFIG_SYS_MAX_FLASH_BANKS      1
 105#define CONFIG_SYS_MAX_FLASH_SECT       256
 106#define CONFIG_SYS_FLASH_ERASE_TOUT     240000
 107#define CONFIG_SYS_FLASH_WRITE_TOUT     500
 108#define CONFIG_SYS_FLASH_LOCK_TOUT      5
 109#define CONFIG_SYS_FLASH_UNLOCK_TOUT    10000
 110#define CONFIG_SYS_FLASH_PROTECTION
 111#define CONFIG_FLASH_CFI_DRIVER
 112#define CONFIG_SYS_FLASH_CFI
 113#define CONFIG_SYS_FLASH_EMPTY_INFO
 114#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 115#define CONFIG_FLASH_VERIFY
 116
 117/*
 118 * Environment settings
 119 */
 120#define CONFIG_ENV_IS_IN_FLASH
 121#define CONFIG_ENV_SIZE         0x10000
 122#define CONFIG_ENV_SECT_SIZE    0x20000
 123#define CONFIG_ENV_OVERWRITE
 124#define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
 125#define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
 126
 127/*
 128 * Memory map
 129 */
 130#define CONFIG_SYS_MBAR                 0xf0000000
 131#define CONFIG_SYS_SDRAM_BASE           0x00000000
 132#define CONFIG_SYS_DEFAULT_MBAR         0x80000000
 133
 134/* Use SRAM until RAM will be available */
 135#define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
 136#define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_SIZE
 137
 138#define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
 139                                         GENERATED_GBL_DATA_SIZE)
 140#define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 141
 142#define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_TEXT_BASE
 143
 144#define CONFIG_SYS_MONITOR_LEN          (512 << 10)
 145#define CONFIG_SYS_MALLOC_LEN           (4 << 20)
 146#define CONFIG_SYS_BOOTMAPSZ            (8 << 20)
 147
 148/*
 149 * Ethernet configuration
 150 */
 151#define CONFIG_MPC5xxx_FEC
 152#define CONFIG_MPC5xxx_FEC_MII100
 153#ifdef CONFIG_A4M2K
 154#define CONFIG_PHY_ADDR                 0x01
 155#else
 156#define CONFIG_PHY_ADDR                 0x00
 157#endif
 158
 159/*
 160 * GPIO configuration
 161 */
 162
 163/*
 164 * GPIO-config depends on failsave-level
 165 * failsave 0 means just MPX-config, no digiboard, no fpga
 166 *          1 means digiboard ok
 167 *          2 means fpga ok
 168 */
 169
 170#ifdef CONFIG_A4M2K
 171#define CONFIG_SYS_GPS_PORT_CONFIG      0x1005C805
 172#else
 173/* for failsave-level 0 - full failsave */
 174#define CONFIG_SYS_GPS_PORT_CONFIG      0x1005C005
 175/* for failsave-level 1 - only digiboard ok */
 176#define CONFIG_SYS_GPS_PORT_CONFIG_1    0x1005C065
 177/* for failsave-level 2 - all ok */
 178#define CONFIG_SYS_GPS_PORT_CONFIG_2    0x1005C065
 179#endif
 180
 181#define CONFIG_WDOG_GPIO_PIN            GPIO_WKUP_7
 182#if defined(CONFIG_A4M2K) && !defined(CONFIG_SPL_BUILD)
 183#define CONFIG_HW_WATCHDOG              /* Use external HW-Watchdog     */
 184#endif
 185
 186/*
 187 * Configuration matrix
 188 *                        MSB                            LSB
 189 * failsave 0  0x1005C005  00010000000001011100000000000101  ( full failsave )
 190 * failsave 1  0x1005C065  00010000000001011100000001100101  ( digib.-ver ok )
 191 * failsave 2  0x1005C065  00010000000001011100000001100101  ( all ok )
 192 *                         || ||| ||  |   ||| |   |   |   |
 193 *                         || ||| ||  |   ||| |   |   |   |  bit rev name
 194 *                         ++-+++-++--+---+++-+---+---+---+-  0   31 CS1
 195 *                          +-+++-++--+---+++-+---+---+---+-  1   30 LPTZ
 196 *                            ||| ||  |   ||| |   |   |   |   2   29 ALTs
 197 *                            +++-++--+---+++-+---+---+---+-  3   28 ALTs
 198 *                             ++-++--+---+++-+---+---+---+-  4   27 CS7
 199 *                              +-++--+---+++-+---+---+---+-  5   26 CS6
 200 *                                ||  |   ||| |   |   |   |   6   25 ATA
 201 *                                ++--+---+++-+---+---+---+-  7   24 ATA
 202 *                                 +--+---+++-+---+---+---+-  8   23 IR_USB_CLK
 203 *                                    |   ||| |   |   |   |   9   22 IRDA
 204 *                                    |   ||| |   |   |   |  10   21 IRDA
 205 *                                    +---+++-+---+---+---+- 11   20 IRDA
 206 *                                        ||| |   |   |   |  12   19 Ether
 207 *                                        ||| |   |   |   |  13   18 Ether
 208 *                                        ||| |   |   |   |  14   17 Ether
 209 *                                        +++-+---+---+---+- 15   16 Ether
 210 *                                         ++-+---+---+---+- 16   15 PCI_DIS
 211 *                                          +-+---+---+---+- 17   14 USB_SE
 212 *                                            |   |   |   |  18   13 USB
 213 *                                            +---+---+---+- 19   12 USB
 214 *                                                |   |   |  20   11 PSC3
 215 *                                                |   |   |  21   10 PSC3
 216 *                                                |   |   |  22    9 PSC3
 217 *                                                +---+---+- 23    8 PSC3
 218 *                                                    |   |  24    7 -
 219 *                                                    |   |  25    6 PSC2
 220 *                                                    |   |  26    5 PSC2
 221 *                                                    +---+- 27    4 PSC2
 222 *                                                        |  28    3 -
 223 *                                                        |  29    2 PSC1
 224 *                                                        |  30    1 PSC1
 225 *                                                        +- 31    0 PSC1
 226 */
 227
 228/*
 229 * Miscellaneous configurable options
 230 */
 231#define CONFIG_SYS_LONGHELP
 232
 233#define CONFIG_CMDLINE_EDITING
 234
 235#if defined(CONFIG_CMD_KGDB)
 236#define CONFIG_SYS_CBSIZE               1024
 237#else
 238#define CONFIG_SYS_CBSIZE               256
 239#endif
 240#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 241#define CONFIG_SYS_MAXARGS              16
 242#define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 243
 244#define CONFIG_SYS_MEMTEST_START        0x00100000
 245#define CONFIG_SYS_MEMTEST_END          0x00f00000
 246
 247#define CONFIG_SYS_LOAD_ADDR            0x00100000
 248
 249/*
 250 * Various low-level settings
 251 */
 252#define CONFIG_SYS_HID0_INIT            (HID0_ICE | HID0_ICFI)
 253#define CONFIG_SYS_HID0_FINAL           HID0_ICE
 254
 255#define CONFIG_SYS_BOOTCS_START         CONFIG_SYS_FLASH_BASE
 256#define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 257#define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
 258#define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 259
 260#ifdef CONFIG_A4M2K
 261/* external MRAM */
 262#define CONFIG_SYS_CS1_START            0xf1000000
 263#define CONFIG_SYS_CS1_SIZE             (512 << 10)     /* 512KiB MRAM */
 264#endif
 265
 266#define CONFIG_SYS_CS2_START            0xe0000000
 267#define CONFIG_SYS_CS2_SIZE             0x00100000
 268
 269/* FPGA slave io (512kiB / 1MiB) - see ticket #66 */
 270#define CONFIG_SYS_CS3_START            0xE9000000
 271#ifdef CONFIG_A4M2K
 272#define CONFIG_SYS_CS3_SIZE             0x00100000
 273#else
 274#define CONFIG_SYS_CS3_SIZE             0x00080000
 275#endif
 276/* 00000000 00110010 1 0 1 1 10 01 00 00 0 0 0 0  = 0x0032B900 */
 277#define CONFIG_SYS_CS3_CFG              0x0032B900
 278
 279#ifndef CONFIG_A4M2K
 280/* Diagnosis Interface - see ticket #63 */
 281#define CONFIG_SYS_CS4_START            0xEA000000
 282#define CONFIG_SYS_CS4_SIZE             0x00000001
 283/* 00000000 00000010 1 0 1 1 10 01 00 00 0 0 0 0  = 0x0002B900 */
 284#define CONFIG_SYS_CS4_CFG              0x0002B900
 285#endif
 286
 287/* FPGA master io (64kiB / 1MiB) - see ticket #66 */
 288#define CONFIG_SYS_CS5_START            0xE8000000
 289#ifdef CONFIG_A4M2K
 290#define CONFIG_SYS_CS5_SIZE             0x00100000
 291#else
 292#define CONFIG_SYS_CS5_SIZE             0x00010000
 293#endif
 294/* 00000000 00110010 1 0 1 1 10 01 00 00 0 0 0 0  = 0x0032B900 */
 295#define CONFIG_SYS_CS5_CFG              0x0032B900
 296
 297#ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2     /* for pci_clk  = 66 MHz */
 298#define CONFIG_SYS_BOOTCS_CFG           0x0006F900
 299#define CONFIG_SYS_CS1_CFG              0x0008FD00
 300#define CONFIG_SYS_CS2_CFG              0x0006F90C
 301#else   /* for pci_clk = 33 MHz */
 302#define CONFIG_SYS_BOOTCS_CFG           0x0002F900
 303#define CONFIG_SYS_CS1_CFG              0x0001FB00
 304#define CONFIG_SYS_CS2_CFG              0x0002F90C
 305#endif
 306
 307#define CONFIG_SYS_CS_BURST             0x00000000
 308/* set DC for FPGA CS5 and CS3 to 0 - see ticket #66 */
 309/* R  7  R  6  R  5  R  4  R  3  R  2  R  1  R  0  */
 310/* 00 11 00 11 00 00 00 11 00 00 00 00 00 00 00 00 */
 311#define CONFIG_SYS_CS_DEADCYCLE         0x33030000
 312
 313#define CONFIG_SYS_RESET_ADDRESS        0xff000000
 314
 315/*
 316 * Environment Configuration
 317 */
 318
 319#undef  CONFIG_BOOTARGS
 320
 321#define CONFIG_SYS_AUTOLOAD     "n"
 322
 323#define CONFIG_PREBOOT  "echo;" \
 324        "echo Type \"run flash_mtd\" to boot from flash with mtd filesystem;" \
 325        "echo Type \"run net_nfs\" to boot from tftp with nfs filesystem;" \
 326        "echo"
 327
 328#undef  CONFIG_BOOTARGS
 329
 330#define CONFIG_SYS_FDT_BASE     0xfc1e0000
 331#define CONFIG_SYS_FDT_SIZE     (16<<10)
 332
 333#define CONFIG_EXTRA_ENV_SETTINGS                                       \
 334        "netdev=eth0\0"                                                 \
 335        "verify=no\0"                                                   \
 336        "loadaddr=200000\0"                                             \
 337        "kernel_addr=" __stringify(CONFIG_SYS_OS_BASE) "\0"             \
 338        "kernel_addr_r=1000000\0"                                       \
 339        "fdt_addr=" __stringify(CONFIG_SYS_FDT_BASE) "\0"               \
 340        "fdt_addr_r=1800000\0"                                          \
 341        "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"            \
 342        "fdtfile=" __stringify(CONFIG_HOSTNAME) "/"                     \
 343                __stringify(CONFIG_HOSTNAME) ".dtb\0"                   \
 344        "rootpath=/opt/eldk-5.2.1/powerpc/"                             \
 345                "core-image-minimal-mtdutils-dropbear-generic\0"        \
 346        "consoledev=ttyPSC0\0"                                          \
 347        "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 348                "nfsroot=${serverip}:${rootpath}\0"                     \
 349        "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 350        "mtdargs=setenv bootargs root=/dev/mtdblock8 "                  \
 351                "rootfstype=squashfs,jffs2\0"                           \
 352        "addhost=setenv bootargs ${bootargs} "                          \
 353                "hostname=${hostname}\0"                                \
 354        "addip=setenv bootargs ${bootargs} "                            \
 355                "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 356                ":${hostname}:${netdev}:off panic=1\0"                  \
 357        "addtty=setenv bootargs ${bootargs} "                           \
 358                "console=${consoledev},${baudrate}\0"                   \
 359        "flash_nfs=run nfsargs addip addtty addmtd addhost;"            \
 360                "bootm ${kernel_addr} - ${fdt_addr}\0"                  \
 361        "flash_mtd=run mtdargs addip addtty addmtd addhost;"            \
 362                "bootm ${kernel_addr} - ${fdt_addr}\0"                  \
 363        "flash_self=run ramargs addip addtty addmtd addhost;"           \
 364                "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0"    \
 365        "net_nfs=tftp ${kernel_addr_r} ${bootfile};"                    \
 366                "tftp ${fdt_addr_r} ${fdtfile};"                        \
 367                "run nfsargs addip addtty addmtd addhost;"              \
 368                "bootm ${kernel_addr_r} - ${fdt_addr_r}\0"              \
 369        "load=tftp ${loadaddr} " __stringify(CONFIG_HOSTNAME)           \
 370                "/u-boot-img.bin\0"                                     \
 371        "update=protect off fc000000 fc07ffff;"                         \
 372                "era fc000000 fc07ffff;"                                \
 373                "cp.b ${loadaddr} fc000000 ${filesize}\0"               \
 374        "upd=run load;run update\0"                                     \
 375        "upd_fdt=tftp 1800000 a3m071/a3m071.dtb;"                       \
 376                "run mtdargs addip addtty addmtd addhost;"              \
 377                "fdt addr 1800000;fdt boardsetup;fdt chosen;"           \
 378                "erase fc1e0000 fc1fffff;cp.b 1800000 fc1e0000 20000"   \
 379        "upd_kernel=tftp 1000000 a3m071/uImage-uncompressed;"           \
 380                "erase fc200000 fc6fffff;"                              \
 381                "cp.b 1000000 fc200000 ${filesize}"                     \
 382        "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
 383        "mtdids=" MTDIDS_DEFAULT "\0"                                   \
 384        "mtdparts=" MTDPARTS_DEFAULT "\0"                               \
 385        ""
 386
 387#define CONFIG_BOOTCOMMAND      "run flash_mtd"
 388
 389/*
 390 * SPL related defines
 391 */
 392#define CONFIG_SPL_FRAMEWORK
 393#define CONFIG_SPL_BOARD_INIT
 394#define CONFIG_SPL_TEXT_BASE    0xfc000000
 395
 396/* Place BSS for SPL near end of SDRAM */
 397#define CONFIG_SPL_BSS_START_ADDR       ((128 - 1) << 20)
 398#define CONFIG_SPL_BSS_MAX_SIZE         (64 << 10)
 399
 400/* Place patched DT blob (fdt) at this address */
 401#define CONFIG_SYS_SPL_ARGS_ADDR        0x01800000
 402
 403/* Settings for real U-Boot to be loaded from NOR flash */
 404#ifndef __ASSEMBLY__
 405extern char __spl_flash_end[];
 406#endif
 407#define CONFIG_SYS_UBOOT_BASE           __spl_flash_end
 408#define CONFIG_SYS_SPL_MAX_LEN          (32 << 10)
 409#define CONFIG_SYS_UBOOT_START          0x1000100
 410
 411#endif /* __CONFIG_H */
 412