1/* 2 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 3 * Copyright (C) 2012 Renesas Solutions Corp. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8#ifndef __KZM9G_H 9#define __KZM9G_H 10 11#undef DEBUG 12 13#define CONFIG_SH73A0 14#define CONFIG_KZM_A9_GT 15#define CONFIG_ARCH_RMOBILE_BOARD_STRING "KMC KZM-A9-GT" 16#define CONFIG_MACH_TYPE MACH_TYPE_KZM9G 17 18#include <asm/arch/rmobile.h> 19 20#define CONFIG_ARCH_CPU_INIT 21#define CONFIG_BOARD_EARLY_INIT_F 22 23#define CONFIG_CMDLINE_TAG 24#define CONFIG_SETUP_MEMORY_TAGS 25#define CONFIG_INITRD_TAG 26#define CONFIG_DOS_PARTITION 27 28#define CONFIG_BAUDRATE 115200 29#define CONFIG_BOOTARGS "root=/dev/null console=ttySC4,115200" 30 31#undef CONFIG_SHOW_BOOT_PROGRESS 32 33/* MEMORY */ 34#define KZM_SDRAM_BASE (0x40000000) 35#define PHYS_SDRAM KZM_SDRAM_BASE 36#define PHYS_SDRAM_SIZE (512 * 1024 * 1024) 37#define CONFIG_NR_DRAM_BANKS (1) 38 39/* NOR Flash */ 40#define KZM_FLASH_BASE (0x00000000) 41#define CONFIG_SYS_FLASH_BASE (KZM_FLASH_BASE) 42#define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT) 43#define CONFIG_SYS_MAX_FLASH_BANKS (1) 44#define CONFIG_SYS_MAX_FLASH_SECT (512) 45 46/* prompt */ 47#define CONFIG_SYS_LONGHELP 48#define CONFIG_SYS_CBSIZE 256 49#define CONFIG_SYS_PBSIZE 256 50#define CONFIG_SYS_MAXARGS 16 51#define CONFIG_SYS_BARGSIZE 512 52#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 53 54/* SCIF */ 55#define CONFIG_SCIF_CONSOLE 56#define CONFIG_CONS_SCIF4 57 58#define CONFIG_SYS_MEMTEST_START (KZM_SDRAM_BASE) 59#define CONFIG_SYS_MEMTEST_END \ 60 (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) 61#undef CONFIG_SYS_ALT_MEMTEST 62#undef CONFIG_SYS_MEMTEST_SCRATCH 63#undef CONFIG_SYS_LOADS_BAUD_CHANGE 64 65#define CONFIG_SYS_INIT_RAM_ADDR (0xE5600000) /* on MERAM */ 66#define CONFIG_SYS_INIT_RAM_SIZE (0x10000) 67#define LOW_LEVEL_MERAM_STACK (CONFIG_SYS_INIT_RAM_ADDR - 4) 68#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 69 CONFIG_SYS_INIT_RAM_SIZE - \ 70 GENERATED_GBL_DATA_SIZE) 71#define CONFIG_SDRAM_OFFSET_FOR_RT (16 * 1024 * 1024) 72#define CONFIG_SYS_SDRAM_BASE (KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT) 73#define CONFIG_SYS_SDRAM_SIZE (PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT) 74#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024) 75 76#define CONFIG_SYS_MONITOR_BASE (KZM_FLASH_BASE) 77#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) 78#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 79 80#define CONFIG_SYS_TEXT_BASE 0x00000000 81#define CONFIG_STANDALONE_LOAD_ADDR 0x41000000 82 83/* FLASH */ 84#define CONFIG_FLASH_CFI_DRIVER 85#define CONFIG_SYS_FLASH_CFI 86#undef CONFIG_SYS_FLASH_QUIET_TEST 87#define CONFIG_SYS_FLASH_EMPTY_INFO 88#define FLASH_SECTOR_SIZE (256 * 1024) /* 256 KB sectors */ 89#define CONFIG_ENV_SIZE FLASH_SECTOR_SIZE 90#define CONFIG_ENV_OFFSET FLASH_SECTOR_SIZE 91#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) 92 93/* Timeout for Flash erase operations (in ms) */ 94#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 95/* Timeout for Flash write operations (in ms) */ 96#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 97/* Timeout for Flash set sector lock bit operations (in ms) */ 98#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 99/* Timeout for Flash clear lock bit operations (in ms) */ 100#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 101 102#undef CONFIG_SYS_FLASH_PROTECTION 103#undef CONFIG_SYS_DIRECT_FLASH_TFTP 104#define CONFIG_ENV_IS_IN_FLASH 105 106/* GPIO / PFC */ 107#define CONFIG_SH_GPIO_PFC 108 109/* Clock */ 110#define CONFIG_GLOBAL_TIMER 111#define CONFIG_SYS_CLK_FREQ (48000000) 112#define CONFIG_SYS_CPU_CLK (1196000000) 113#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 114#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */ 115 116/* Ether */ 117#define CONFIG_SMC911X 118#define CONFIG_SMC911X_BASE (0x10000000) 119#define CONFIG_SMC911X_32_BIT 120#define CONFIG_NFS_TIMEOUT 10000UL 121 122/* I2C */ 123#define CONFIG_SYS_I2C 124#define CONFIG_SYS_I2C_SH 125#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5 126#define CONFIG_SYS_I2C_SH_BASE0 0xE6820000 127#define CONFIG_SYS_I2C_SH_SPEED0 100000 128#define CONFIG_SYS_I2C_SH_BASE1 0xE6822000 129#define CONFIG_SYS_I2C_SH_SPEED1 100000 130#define CONFIG_SYS_I2C_SH_BASE2 0xE6824000 131#define CONFIG_SYS_I2C_SH_SPEED2 100000 132#define CONFIG_SYS_I2C_SH_BASE3 0xE6826000 133#define CONFIG_SYS_I2C_SH_SPEED3 100000 134#define CONFIG_SYS_I2C_SH_BASE4 0xE6828000 135#define CONFIG_SYS_I2C_SH_SPEED4 100000 136#define CONFIG_SH_I2C_8BIT 137#define CONFIG_SH_I2C_DATA_HIGH 4 138#define CONFIG_SH_I2C_DATA_LOW 5 139#define CONFIG_SH_I2C_CLOCK 104000000 /* 104 MHz */ 140 141#endif /* __KZM9G_H */ 142