LXR uboot/include/configs/omap3

   1/*
   2 * Configuration settings for the TI OMAP3 EVM board.
   3 *
   4 * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
   5 *
   6 * Author :
   7 *      Manikandan Pillai <mani.pillai@ti.com>
   8 * Derived from Beagle Board and 3430 SDP code by
   9 *      Richard Woodruff <r-woodruff2@ti.com>
  10 *      Syed Mohammed Khasim <khasim@ti.com>
  11 *
  12 * Manikandan Pillai <mani.pillai@ti.com>
  13 *
  14 * SPDX-License-Identifier:     GPL-2.0+
  15 */
  16
  17#ifndef __OMAP3EVM_CONFIG_H
  18#define __OMAP3EVM_CONFIG_H
  19
  20#include <asm/arch/cpu.h>
  21#include <asm/arch/omap.h>
  22
  23/* ----------------------------------------------------------------------------
  24 * Supported U-Boot commands
  25 * ----------------------------------------------------------------------------
  26 */
  27
  28#define CONFIG_CMD_JFFS2
  29
  30#define CONFIG_CMD_NAND
  31
  32/* ----------------------------------------------------------------------------
  33 * Supported U-Boot features
  34 * ----------------------------------------------------------------------------
  35 */
  36#define CONFIG_SYS_LONGHELP
  37
  38/* Allow to overwrite serial and ethaddr */
  39#define CONFIG_ENV_OVERWRITE
  40
  41/* Add auto-completion support */
  42#define CONFIG_AUTO_COMPLETE
  43
  44/* ----------------------------------------------------------------------------
  45 * Supported hardware
  46 * ----------------------------------------------------------------------------
  47 */
  48
  49/* MMC */
  50#define CONFIG_GENERIC_MMC
  51#define CONFIG_OMAP_HSMMC
  52
  53/* SPL */
  54#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
  55#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
  56
  57/* Partition tables */
  58#define CONFIG_EFI_PARTITION
  59#define CONFIG_DOS_PARTITION
  60
  61/* USB
  62 *
  63 * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
  64 * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
  65 */
  66#define CONFIG_USB_OMAP3
  67#define CONFIG_USB_MUSB_HCD
  68/* #define CONFIG_USB_MUSB_UDC */
  69
  70/* NAND SPL */
  71#define CONFIG_SPL_NAND_SIMPLE
  72#define CONFIG_SPL_NAND_BASE
  73#define CONFIG_SPL_NAND_DRIVERS
  74#define CONFIG_SPL_NAND_ECC
  75#define CONFIG_SYS_NAND_5_ADDR_CYCLE
  76#define CONFIG_SYS_NAND_PAGE_COUNT      64
  77#define CONFIG_SYS_NAND_PAGE_SIZE       2048
  78#define CONFIG_SYS_NAND_OOBSIZE         64
  79#define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
  80#define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
  81#define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
  82                                                10, 11, 12, 13}
  83#define CONFIG_SYS_NAND_ECCSIZE         512
  84#define CONFIG_SYS_NAND_ECCBYTES        3
  85#define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_HAM1_CODE_HW
  86#define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
  87#define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
  88
  89/*
  90 * High level configuration options
  91 */
  92#define CONFIG_OMAP                     /* This is TI OMAP core */
  93#define CONFIG_OMAP_GPIO
  94/* Common ARM Erratas */
  95#define CONFIG_ARM_ERRATA_454179
  96#define CONFIG_ARM_ERRATA_430973
  97#define CONFIG_ARM_ERRATA_621766
  98
  99#define CONFIG_SDRC                     /* The chip has SDRC controller */
 100
 101#define CONFIG_OMAP3_EVM                /* This is a OMAP3 EVM */
 102#define CONFIG_TWL4030_POWER            /* with TWL4030 PMIC */
 103
 104/*
 105 * Clock related definitions
 106 */
 107#define V_OSCK                  26000000        /* Clock output from T2 */
 108#define V_SCLK                  (V_OSCK >> 1)
 109
 110/*
 111 * OMAP3 has 12 GP timers, they can be driven by the system clock
 112 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 113 * This rate is divided by a local divisor.
 114 */
 115#define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
 116#define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 117
 118/* Size of environment - 128KB */
 119#define CONFIG_ENV_SIZE                 (128 << 10)
 120
 121/* Size of malloc pool */
 122#define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
 123
 124/*
 125 * Physical Memory Map
 126 * Note 1: CS1 may or may not be populated
 127 * Note 2: SDRAM size is expected to be at least 32MB
 128 */
 129#define CONFIG_NR_DRAM_BANKS            2
 130#define PHYS_SDRAM_1                    OMAP34XX_SDRC_CS0
 131#define PHYS_SDRAM_2                    OMAP34XX_SDRC_CS1
 132
 133/* Limits for memtest */
 134#define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
 135#define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 136                                                0x01F00000) /* 31MB */
 137
 138/* Default load address */
 139#define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)
 140
 141/* -----------------------------------------------------------------------------
 142 * Hardware drivers
 143 * -----------------------------------------------------------------------------
 144 */
 145
 146/*
 147 * NS16550 Configuration
 148 */
 149#define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
 150
 151#define CONFIG_SYS_NS16550_SERIAL
 152#define CONFIG_SYS_NS16550_REG_SIZE     (-4)
 153#define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
 154
 155/*
 156 * select serial console configuration
 157 */
 158#define CONFIG_CONS_INDEX               1
 159#define CONFIG_SERIAL1                  1       /* UART1 on OMAP3 EVM */
 160#define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
 161#define CONFIG_BAUDRATE                 115200
 162#define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
 163                                        115200}
 164
 165/*
 166 * I2C
 167 */
 168#define CONFIG_SYS_I2C
 169#define CONFIG_SYS_OMAP24_I2C_SPEED     100000
 170#define CONFIG_SYS_OMAP24_I2C_SLAVE     1
 171#define CONFIG_SYS_I2C_OMAP34XX
 172
 173/*
 174 * PISMO support
 175 */
 176/* Monitor at start of flash - Reserve 2 sectors */
 177#define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 178
 179#define CONFIG_SYS_MONITOR_LEN          (256 << 10)
 180
 181/* Start location & size of environment */
 182#define ONENAND_ENV_OFFSET              0x260000
 183#define SMNAND_ENV_OFFSET               0x260000
 184
 185#define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 186
 187/*
 188 * NAND
 189 */
 190/* Physical address to access NAND */
 191#define CONFIG_SYS_NAND_ADDR            NAND_BASE
 192
 193/* Physical address to access NAND at CS0 */
 194#define CONFIG_SYS_NAND_BASE            NAND_BASE
 195
 196/* Max number of NAND devices */
 197#define CONFIG_SYS_MAX_NAND_DEVICE      1
 198#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 199/* Timeout values (in ticks) */
 200#define CONFIG_SYS_FLASH_ERASE_TOUT     (100 * CONFIG_SYS_HZ)
 201#define CONFIG_SYS_FLASH_WRITE_TOUT     (100 * CONFIG_SYS_HZ)
 202
 203/* Flash banks JFFS2 should use */
 204#define CONFIG_SYS_MAX_MTD_BANKS        (CONFIG_SYS_MAX_FLASH_BANKS + \
 205                                                CONFIG_SYS_MAX_NAND_DEVICE)
 206
 207#define CONFIG_SYS_JFFS2_MEM_NAND
 208#define CONFIG_SYS_JFFS2_FIRST_BANK     CONFIG_SYS_MAX_FLASH_BANKS
 209#define CONFIG_SYS_JFFS2_NUM_BANKS      1
 210
 211#define CONFIG_JFFS2_NAND
 212/* nand device jffs2 lives on */
 213#define CONFIG_JFFS2_DEV                "nand0"
 214/* Start of jffs2 partition */
 215#define CONFIG_JFFS2_PART_OFFSET        0x680000
 216/* Size of jffs2 partition */
 217#define CONFIG_JFFS2_PART_SIZE          0xf980000
 218
 219/*
 220 * USB
 221 */
 222#ifdef CONFIG_USB_OMAP3
 223
 224#ifdef CONFIG_USB_MUSB_HCD
 225
 226#define CONGIG_CMD_STORAGE
 227
 228#ifdef CONFIG_USB_KEYBOARD
 229#define CONFIG_SYS_USB_EVENT_POLL
 230#define CONFIG_PREBOOT                  "usb start"
 231#endif /* CONFIG_USB_KEYBOARD */
 232
 233#endif /* CONFIG_USB_MUSB_HCD */
 234
 235#ifdef CONFIG_USB_MUSB_UDC
 236/* USB device configuration */
 237#define CONFIG_USB_DEVICE
 238#define CONFIG_USB_TTY
 239
 240/* Change these to suit your needs */
 241#define CONFIG_USBD_VENDORID            0x0451
 242#define CONFIG_USBD_PRODUCTID           0x5678
 243#define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
 244#define CONFIG_USBD_PRODUCT_NAME        "EVM"
 245#endif /* CONFIG_USB_MUSB_UDC */
 246
 247#endif /* CONFIG_USB_OMAP3 */
 248
 249/* ----------------------------------------------------------------------------
 250 * U-Boot features
 251 * ----------------------------------------------------------------------------
 252 */
 253#define CONFIG_SYS_MAXARGS              16      /* max args for a command */
 254
 255#define CONFIG_MISC_INIT_R
 256
 257#define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
 258#define CONFIG_SETUP_MEMORY_TAGS
 259#define CONFIG_INITRD_TAG
 260#define CONFIG_REVISION_TAG
 261
 262/* Size of Console IO buffer */
 263#define CONFIG_SYS_CBSIZE               512
 264
 265/* Size of print buffer */
 266#define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 267                                                sizeof(CONFIG_SYS_PROMPT) + 16)
 268
 269/* Size of bootarg buffer */
 270#define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 271
 272#define CONFIG_BOOTFILE                 "uImage"
 273
 274/*
 275 * NAND / OneNAND
 276 */
 277#if defined(CONFIG_CMD_NAND)
 278#define CONFIG_SYS_FLASH_BASE           NAND_BASE
 279
 280#define CONFIG_NAND_OMAP_GPMC
 281#define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 282#elif defined(CONFIG_CMD_ONENAND)
 283#define CONFIG_SYS_FLASH_BASE           ONENAND_MAP
 284#define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 285#endif
 286
 287#if !defined(CONFIG_ENV_IS_NOWHERE)
 288#if defined(CONFIG_CMD_NAND)
 289#define CONFIG_ENV_IS_IN_NAND
 290#elif defined(CONFIG_CMD_ONENAND)
 291#define CONFIG_ENV_IS_IN_ONENAND
 292#define CONFIG_ENV_OFFSET               ONENAND_ENV_OFFSET
 293#endif
 294#endif /* CONFIG_ENV_IS_NOWHERE */
 295
 296#define CONFIG_ENV_ADDR                 CONFIG_ENV_OFFSET
 297
 298#if defined(CONFIG_CMD_NET)
 299
 300/* Ethernet (SMSC9115 from SMSC9118 family) */
 301#define CONFIG_SMC911X
 302#define CONFIG_SMC911X_32_BIT
 303#define CONFIG_SMC911X_BASE             0x2C000000
 304
 305/* BOOTP fields */
 306#define CONFIG_BOOTP_SUBNETMASK         0x00000001
 307#define CONFIG_BOOTP_GATEWAY            0x00000002
 308#define CONFIG_BOOTP_HOSTNAME           0x00000004
 309#define CONFIG_BOOTP_BOOTPATH           0x00000010
 310
 311#endif /* CONFIG_CMD_NET */
 312
 313/* Support for relocation */
 314#define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 315#define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 316#define CONFIG_SYS_INIT_RAM_SIZE        0x800
 317#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 318                                         CONFIG_SYS_INIT_RAM_SIZE - \
 319                                         GENERATED_GBL_DATA_SIZE)
 320
 321/* -----------------------------------------------------------------------------
 322 * Board specific
 323 * -----------------------------------------------------------------------------
 324 */
 325#define CONFIG_SYS_NO_FLASH
 326
 327/* Uncomment to define the board revision statically */
 328/* #define CONFIG_STATIC_BOARD_REV      OMAP3EVM_BOARD_GEN_2 */
 329
 330/* Defines for SPL */
 331#define CONFIG_SPL_FRAMEWORK
 332#define CONFIG_SPL_TEXT_BASE            0x40200800
 333#define CONFIG_SPL_MAX_SIZE             (SRAM_SCRATCH_SPACE_ADDR - \
 334                                         CONFIG_SPL_TEXT_BASE)
 335
 336#define CONFIG_SPL_BSS_START_ADDR       0x80000000
 337#define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
 338
 339#define CONFIG_SPL_BOARD_INIT
 340#define CONFIG_SPL_OMAP3_ID_NAND
 341#define CONFIG_SPL_LDSCRIPT             "arch/arm/mach-omap2/u-boot-spl.lds"
 342
 343/*
 344 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
 345 * 64 bytes before this address should be set aside for u-boot.img's
 346 * header. That is 0x800FFFC0--0x80100000 should not be used for any
 347 * other needs.
 348 */
 349#define CONFIG_SYS_TEXT_BASE            0x80100000
 350#define CONFIG_SYS_SPL_MALLOC_START     0x80208000
 351#define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
 352
 353/* -----------------------------------------------------------------------------
 354 * Default environment
 355 * -----------------------------------------------------------------------------
 356 */
 357
 358#define CONFIG_EXTRA_ENV_SETTINGS \
 359        "loadaddr=0x82000000\0" \
 360        "usbtty=cdc_acm\0" \
 361        "mmcdev=0\0" \
 362        "console=ttyO0,115200n8\0" \
 363        "mmcargs=setenv bootargs console=${console} " \
 364                "root=/dev/mmcblk0p2 rw " \
 365                "rootfstype=ext3 rootwait\0" \
 366        "nandargs=setenv bootargs console=${console} " \
 367                "root=/dev/mtdblock4 rw " \
 368                "rootfstype=jffs2\0" \
 369        "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
 370        "bootscript=echo Running bootscript from mmc ...; " \
 371                "source ${loadaddr}\0" \
 372        "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 373        "mmcboot=echo Booting from mmc ...; " \
 374                "run mmcargs; " \
 375                "bootm ${loadaddr}\0" \
 376        "nandboot=echo Booting from nand ...; " \
 377                "run nandargs; " \
 378                "onenand read ${loadaddr} 280000 400000; " \
 379                "bootm ${loadaddr}\0" \
 380
 381#define CONFIG_BOOTCOMMAND \
 382        "mmc dev ${mmcdev}; if mmc rescan; then " \
 383                "if run loadbootscript; then " \
 384                        "run bootscript; " \
 385                "else " \
 386                        "if run loaduimage; then " \
 387                                "run mmcboot; " \
 388                        "else run nandboot; " \
 389                        "fi; " \
 390                "fi; " \
 391        "else run nandboot; fi"
 392
 393#endif /* __OMAP3EVM_CONFIG_H */
 394