uboot/board/davinci/da8xxevm/da850evm.c
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   1/*
   2 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
   3 *
   4 * Based on da830evm.c. Original Copyrights follow:
   5 *
   6 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
   7 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
   8 *
   9 * SPDX-License-Identifier:     GPL-2.0+
  10 */
  11
  12#include <common.h>
  13#include <i2c.h>
  14#include <net.h>
  15#include <netdev.h>
  16#include <spi.h>
  17#include <spi_flash.h>
  18#include <asm/arch/hardware.h>
  19#include <asm/ti-common/davinci_nand.h>
  20#include <asm/arch/emac_defs.h>
  21#include <asm/arch/pinmux_defs.h>
  22#include <asm/io.h>
  23#include <asm/arch/davinci_misc.h>
  24#include <linux/errno.h>
  25#include <hwconfig.h>
  26
  27#ifdef CONFIG_MMC_DAVINCI
  28#include <mmc.h>
  29#include <asm/arch/sdmmc_defs.h>
  30#endif
  31
  32DECLARE_GLOBAL_DATA_PTR;
  33
  34#ifdef CONFIG_DRIVER_TI_EMAC
  35#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
  36#define HAS_RMII 1
  37#else
  38#define HAS_RMII 0
  39#endif
  40#endif /* CONFIG_DRIVER_TI_EMAC */
  41
  42#define CFG_MAC_ADDR_SPI_BUS    0
  43#define CFG_MAC_ADDR_SPI_CS     0
  44#define CFG_MAC_ADDR_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
  45#define CFG_MAC_ADDR_SPI_MODE   SPI_MODE_3
  46
  47#define CFG_MAC_ADDR_OFFSET     (flash->size - SZ_64K)
  48
  49#ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
  50static int get_mac_addr(u8 *addr)
  51{
  52        struct spi_flash *flash;
  53        int ret;
  54
  55        flash = spi_flash_probe(CFG_MAC_ADDR_SPI_BUS, CFG_MAC_ADDR_SPI_CS,
  56                        CFG_MAC_ADDR_SPI_MAX_HZ, CFG_MAC_ADDR_SPI_MODE);
  57        if (!flash) {
  58                printf("Error - unable to probe SPI flash.\n");
  59                return -1;
  60        }
  61
  62        ret = spi_flash_read(flash, CFG_MAC_ADDR_OFFSET, 6, addr);
  63        if (ret) {
  64                printf("Error - unable to read MAC address from SPI flash.\n");
  65                return -1;
  66        }
  67
  68        return ret;
  69}
  70#endif
  71
  72void dsp_lpsc_on(unsigned domain, unsigned int id)
  73{
  74        dv_reg_p mdstat, mdctl, ptstat, ptcmd;
  75        struct davinci_psc_regs *psc_regs;
  76
  77        psc_regs = davinci_psc0_regs;
  78        mdstat = &psc_regs->psc0.mdstat[id];
  79        mdctl = &psc_regs->psc0.mdctl[id];
  80        ptstat = &psc_regs->ptstat;
  81        ptcmd = &psc_regs->ptcmd;
  82
  83        while (*ptstat & (0x1 << domain))
  84                ;
  85
  86        if ((*mdstat & 0x1f) == 0x03)
  87                return;                 /* Already on and enabled */
  88
  89        *mdctl |= 0x03;
  90
  91        *ptcmd = 0x1 << domain;
  92
  93        while (*ptstat & (0x1 << domain))
  94                ;
  95        while ((*mdstat & 0x1f) != 0x03)
  96                ;               /* Probably an overkill... */
  97}
  98
  99static void dspwake(void)
 100{
 101        unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE;
 102        u32 val;
 103
 104        /* if the device is ARM only, return */
 105        if ((readl(CHIP_REV_ID_REG) & 0x3f) == 0x10)
 106                return;
 107
 108        if (hwconfig_subarg_cmp_f("dsp", "wake", "no", NULL))
 109                return;
 110
 111        *resetvect++ = 0x1E000; /* DSP Idle */
 112        /* clear out the next 10 words as NOP */
 113        memset(resetvect, 0, sizeof(unsigned) *10);
 114
 115        /* setup the DSP reset vector */
 116        writel(DAVINCI_L3CBARAM_BASE, HOST1CFG);
 117
 118        dsp_lpsc_on(1, DAVINCI_LPSC_GEM);
 119        val = readl(PSC0_MDCTL + (15 * 4));
 120        val |= 0x100;
 121        writel(val, (PSC0_MDCTL + (15 * 4)));
 122}
 123
 124int misc_init_r(void)
 125{
 126        dspwake();
 127
 128#if defined(CONFIG_MAC_ADDR_IN_SPIFLASH) || defined(CONFIG_MAC_ADDR_IN_EEPROM)
 129
 130        uchar env_enetaddr[6];
 131        int enetaddr_found;
 132
 133        enetaddr_found = eth_getenv_enetaddr("ethaddr", env_enetaddr);
 134
 135#ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
 136        int spi_mac_read;
 137        uchar buff[6];
 138
 139        spi_mac_read = get_mac_addr(buff);
 140
 141        /*
 142         * MAC address not present in the environment
 143         * try and read the MAC address from SPI flash
 144         * and set it.
 145         */
 146        if (!enetaddr_found) {
 147                if (!spi_mac_read) {
 148                        if (is_valid_ethaddr(buff)) {
 149                                if (eth_setenv_enetaddr("ethaddr", buff)) {
 150                                        printf("Warning: Failed to "
 151                                        "set MAC address from SPI flash\n");
 152                                }
 153                        } else {
 154                                        printf("Warning: Invalid "
 155                                        "MAC address read from SPI flash\n");
 156                        }
 157                }
 158        } else {
 159                /*
 160                 * MAC address present in environment compare it with
 161                 * the MAC address in SPI flash and warn on mismatch
 162                 */
 163                if (!spi_mac_read && is_valid_ethaddr(buff) &&
 164                    memcmp(env_enetaddr, buff, 6))
 165                        printf("Warning: MAC address in SPI flash don't match "
 166                                        "with the MAC address in the environment\n");
 167                printf("Default using MAC address from environment\n");
 168        }
 169#endif
 170        uint8_t enetaddr[8];
 171        int eeprom_mac_read;
 172
 173        /* Read Ethernet MAC address from EEPROM */
 174        eeprom_mac_read = dvevm_read_mac_address(enetaddr);
 175
 176        /*
 177         * MAC address not present in the environment
 178         * try and read the MAC address from EEPROM flash
 179         * and set it.
 180         */
 181        if (!enetaddr_found) {
 182                if (eeprom_mac_read)
 183                        /* Set Ethernet MAC address from EEPROM */
 184                        davinci_sync_env_enetaddr(enetaddr);
 185        } else {
 186                /*
 187                 * MAC address present in environment compare it with
 188                 * the MAC address in EEPROM and warn on mismatch
 189                 */
 190                if (eeprom_mac_read && memcmp(enetaddr, env_enetaddr, 6))
 191                        printf("Warning: MAC address in EEPROM don't match "
 192                                        "with the MAC address in the environment\n");
 193                printf("Default using MAC address from environment\n");
 194        }
 195
 196#endif
 197        return 0;
 198}
 199
 200#ifdef CONFIG_MMC_DAVINCI
 201static struct davinci_mmc mmc_sd0 = {
 202        .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
 203        .host_caps = MMC_MODE_4BIT,     /* DA850 supports only 4-bit SD/MMC */
 204        .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
 205        .version = MMC_CTLR_VERSION_2,
 206};
 207
 208int board_mmc_init(bd_t *bis)
 209{
 210        mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID);
 211
 212        /* Add slot-0 to mmc subsystem */
 213        return davinci_mmc_init(bis, &mmc_sd0);
 214}
 215#endif
 216
 217static const struct pinmux_config gpio_pins[] = {
 218#ifdef CONFIG_USE_NOR
 219        /* GP0[11] is required for NOR to work on Rev 3 EVMs */
 220        { pinmux(0), 8, 4 },    /* GP0[11] */
 221#endif
 222#ifdef CONFIG_MMC_DAVINCI
 223        /* GP0[11] is required for SD to work on Rev 3 EVMs */
 224        { pinmux(0),  8, 4 },   /* GP0[11] */
 225#endif
 226};
 227
 228const struct pinmux_resource pinmuxes[] = {
 229#ifdef CONFIG_DRIVER_TI_EMAC
 230        PINMUX_ITEM(emac_pins_mdio),
 231#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
 232        PINMUX_ITEM(emac_pins_rmii),
 233#else
 234        PINMUX_ITEM(emac_pins_mii),
 235#endif
 236#endif
 237#ifdef CONFIG_SPI_FLASH
 238        PINMUX_ITEM(spi1_pins_base),
 239        PINMUX_ITEM(spi1_pins_scs0),
 240#endif
 241        PINMUX_ITEM(uart2_pins_txrx),
 242        PINMUX_ITEM(uart2_pins_rtscts),
 243        PINMUX_ITEM(i2c0_pins),
 244#ifdef CONFIG_NAND_DAVINCI
 245        PINMUX_ITEM(emifa_pins_cs3),
 246        PINMUX_ITEM(emifa_pins_cs4),
 247        PINMUX_ITEM(emifa_pins_nand),
 248#elif defined(CONFIG_USE_NOR)
 249        PINMUX_ITEM(emifa_pins_cs2),
 250        PINMUX_ITEM(emifa_pins_nor),
 251#endif
 252        PINMUX_ITEM(gpio_pins),
 253#ifdef CONFIG_MMC_DAVINCI
 254        PINMUX_ITEM(mmc0_pins),
 255#endif
 256};
 257
 258const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
 259
 260const struct lpsc_resource lpsc[] = {
 261        { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
 262        { DAVINCI_LPSC_SPI1 },  /* Serial Flash */
 263        { DAVINCI_LPSC_EMAC },  /* image download */
 264        { DAVINCI_LPSC_UART2 }, /* console */
 265        { DAVINCI_LPSC_GPIO },
 266#ifdef CONFIG_MMC_DAVINCI
 267        { DAVINCI_LPSC_MMC_SD },
 268#endif
 269};
 270
 271const int lpsc_size = ARRAY_SIZE(lpsc);
 272
 273#ifndef CONFIG_DA850_EVM_MAX_CPU_CLK
 274#define CONFIG_DA850_EVM_MAX_CPU_CLK    300000000
 275#endif
 276
 277#define REV_AM18X_EVM           0x100
 278
 279/*
 280 * get_board_rev() - setup to pass kernel board revision information
 281 * Returns:
 282 * bit[0-3]     Maximum cpu clock rate supported by onboard SoC
 283 *              0000b - 300 MHz
 284 *              0001b - 372 MHz
 285 *              0010b - 408 MHz
 286 *              0011b - 456 MHz
 287 */
 288u32 get_board_rev(void)
 289{
 290        char *s;
 291        u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK;
 292        u32 rev = 0;
 293
 294        s = getenv("maxcpuclk");
 295        if (s)
 296                maxcpuclk = simple_strtoul(s, NULL, 10);
 297
 298        if (maxcpuclk >= 456000000)
 299                rev = 3;
 300        else if (maxcpuclk >= 408000000)
 301                rev = 2;
 302        else if (maxcpuclk >= 372000000)
 303                rev = 1;
 304#ifdef CONFIG_DA850_AM18X_EVM
 305        rev |= REV_AM18X_EVM;
 306#endif
 307        return rev;
 308}
 309
 310int board_early_init_f(void)
 311{
 312        /*
 313         * Power on required peripherals
 314         * ARM does not have access by default to PSC0 and PSC1
 315         * assuming here that the DSP bootloader has set the IOPU
 316         * such that PSC access is available to ARM
 317         */
 318        if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
 319                return 1;
 320
 321        return 0;
 322}
 323
 324int board_init(void)
 325{
 326#ifndef CONFIG_USE_IRQ
 327        irq_init();
 328#endif
 329
 330#ifdef CONFIG_NAND_DAVINCI
 331        /*
 332         * NAND CS setup - cycle counts based on da850evm NAND timings in the
 333         * Linux kernel @ 25MHz EMIFA
 334         */
 335        writel((DAVINCI_ABCR_WSETUP(2) |
 336                DAVINCI_ABCR_WSTROBE(2) |
 337                DAVINCI_ABCR_WHOLD(1) |
 338                DAVINCI_ABCR_RSETUP(1) |
 339                DAVINCI_ABCR_RSTROBE(4) |
 340                DAVINCI_ABCR_RHOLD(0) |
 341                DAVINCI_ABCR_TA(1) |
 342                DAVINCI_ABCR_ASIZE_8BIT),
 343               &davinci_emif_regs->ab2cr); /* CS3 */
 344#endif
 345
 346        /* arch number of the board */
 347        gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM;
 348
 349        /* address of boot parameters */
 350        gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
 351
 352        /* setup the SUSPSRC for ARM to control emulation suspend */
 353        writel(readl(&davinci_syscfg_regs->suspsrc) &
 354               ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
 355                 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
 356                 DAVINCI_SYSCFG_SUSPSRC_UART2),
 357               &davinci_syscfg_regs->suspsrc);
 358
 359        /* configure pinmux settings */
 360        if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
 361                return 1;
 362
 363#ifdef CONFIG_USE_NOR
 364        /* Set the GPIO direction as output */
 365        clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
 366
 367        /* Set the output as low */
 368        writel(0x01 << 11, GPIO_BANK0_REG_CLR_ADDR);
 369#endif
 370
 371#ifdef CONFIG_MMC_DAVINCI
 372        /* Set the GPIO direction as output */
 373        clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
 374
 375        /* Set the output as high */
 376        writel(0x01 << 11, GPIO_BANK0_REG_SET_ADDR);
 377#endif
 378
 379#ifdef CONFIG_DRIVER_TI_EMAC
 380        davinci_emac_mii_mode_sel(HAS_RMII);
 381#endif /* CONFIG_DRIVER_TI_EMAC */
 382
 383        /* enable the console UART */
 384        writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
 385                DAVINCI_UART_PWREMU_MGMT_UTRST),
 386               &davinci_uart2_ctrl_regs->pwremu_mgmt);
 387
 388        return 0;
 389}
 390
 391#ifdef CONFIG_DRIVER_TI_EMAC
 392
 393#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
 394/**
 395 * rmii_hw_init
 396 *
 397 * DA850/OMAP-L138 EVM can interface to a daughter card for
 398 * additional features. This card has an I2C GPIO Expander TCA6416
 399 * to select the required functions like camera, RMII Ethernet,
 400 * character LCD, video.
 401 *
 402 * Initialization of the expander involves configuring the
 403 * polarity and direction of the ports. P07-P05 are used here.
 404 * These ports are connected to a Mux chip which enables only one
 405 * functionality at a time.
 406 *
 407 * For RMII phy to respond, the MII MDIO clock has to be  disabled
 408 * since both the PHY devices have address as zero. The MII MDIO
 409 * clock is controlled via GPIO2[6].
 410 *
 411 * This code is valid for Beta version of the hardware
 412 */
 413int rmii_hw_init(void)
 414{
 415        const struct pinmux_config gpio_pins[] = {
 416                { pinmux(6), 8, 1 }
 417        };
 418        u_int8_t buf[2];
 419        unsigned int temp;
 420        int ret;
 421
 422        /* PinMux for GPIO */
 423        if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0)
 424                return 1;
 425
 426        /* I2C Exapnder configuration */
 427        /* Set polarity to non-inverted */
 428        buf[0] = 0x0;
 429        buf[1] = 0x0;
 430        ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 4, 1, buf, 2);
 431        if (ret) {
 432                printf("\nExpander @ 0x%02x write FAILED!!!\n",
 433                                CONFIG_SYS_I2C_EXPANDER_ADDR);
 434                return ret;
 435        }
 436
 437        /* Configure P07-P05 as outputs */
 438        buf[0] = 0x1f;
 439        buf[1] = 0xff;
 440        ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 6, 1, buf, 2);
 441        if (ret) {
 442                printf("\nExpander @ 0x%02x write FAILED!!!\n",
 443                                CONFIG_SYS_I2C_EXPANDER_ADDR);
 444        }
 445
 446        /* For Ethernet RMII selection
 447         * P07(SelA)=0
 448         * P06(SelB)=1
 449         * P05(SelC)=1
 450         */
 451        if (i2c_read(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
 452                printf("\nExpander @ 0x%02x read FAILED!!!\n",
 453                                CONFIG_SYS_I2C_EXPANDER_ADDR);
 454        }
 455
 456        buf[0] &= 0x1f;
 457        buf[0] |= (0 << 7) | (1 << 6) | (1 << 5);
 458        if (i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
 459                printf("\nExpander @ 0x%02x write FAILED!!!\n",
 460                                CONFIG_SYS_I2C_EXPANDER_ADDR);
 461        }
 462
 463        /* Set the output as high */
 464        temp = REG(GPIO_BANK2_REG_SET_ADDR);
 465        temp |= (0x01 << 6);
 466        REG(GPIO_BANK2_REG_SET_ADDR) = temp;
 467
 468        /* Set the GPIO direction as output */
 469        temp = REG(GPIO_BANK2_REG_DIR_ADDR);
 470        temp &= ~(0x01 << 6);
 471        REG(GPIO_BANK2_REG_DIR_ADDR) = temp;
 472
 473        return 0;
 474}
 475#endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
 476
 477/*
 478 * Initializes on-board ethernet controllers.
 479 */
 480int board_eth_init(bd_t *bis)
 481{
 482#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
 483        /* Select RMII fucntion through the expander */
 484        if (rmii_hw_init())
 485                printf("RMII hardware init failed!!!\n");
 486#endif
 487        if (!davinci_emac_initialize()) {
 488                printf("Error: Ethernet init failed!\n");
 489                return -1;
 490        }
 491
 492        return 0;
 493}
 494#endif /* CONFIG_DRIVER_TI_EMAC */
 495