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40#include <common.h>
41#include <post.h>
42#include <watchdog.h>
43#include <serial.h>
44#include <linux/compiler.h>
45#include <asm/blackfin.h>
46#include <asm/serial.h>
47
48DECLARE_GLOBAL_DATA_PTR;
49
50#ifdef CONFIG_UART_CONSOLE
51
52#ifdef CONFIG_DEBUG_SERIAL
53static uart_lsr_t cached_lsr[256];
54static uart_lsr_t cached_rbr[256];
55static size_t cache_count;
56
57
58
59
60
61
62static uart_lsr_t uart_lsr_save;
63static uart_lsr_t uart_lsr_read(uint32_t uart_base)
64{
65 uart_lsr_t lsr = _lsr_read(pUART);
66 uart_lsr_save |= (lsr & (OE|PE|FE|BI));
67 return lsr | uart_lsr_save;
68}
69
70static void uart_lsr_clear(uint32_t uart_base)
71{
72 uart_lsr_save = 0;
73 _lsr_write(pUART, -1);
74}
75#else
76
77
78
79
80static inline uart_lsr_t uart_lsr_read(uint32_t uart_base)
81{
82 return _lsr_read(pUART);
83}
84static void uart_lsr_clear(uint32_t uart_base)
85{
86 _lsr_write(pUART, -1);
87}
88#endif
89
90static void uart_putc(uint32_t uart_base, const char c)
91{
92
93 if (c == '\n')
94 serial_putc('\r');
95
96 WATCHDOG_RESET();
97
98
99 while (!(uart_lsr_read(uart_base) & THRE))
100 continue;
101
102
103 bfin_write(&pUART->thr, c);
104 SSYNC();
105
106 WATCHDOG_RESET();
107}
108
109static int uart_tstc(uint32_t uart_base)
110{
111 WATCHDOG_RESET();
112 return (uart_lsr_read(uart_base) & DR) ? 1 : 0;
113}
114
115static int uart_getc(uint32_t uart_base)
116{
117 uint16_t uart_rbr_val;
118
119
120 while (!uart_tstc(uart_base))
121 continue;
122
123
124 uart_rbr_val = bfin_read(&pUART->rbr);
125
126#ifdef CONFIG_DEBUG_SERIAL
127
128 uart_lsr_t uart_lsr_val = uart_lsr_read(uart_base);
129
130 cached_lsr[cache_count] = uart_lsr_val;
131 cached_rbr[cache_count] = uart_rbr_val;
132 cache_count = (cache_count + 1) % ARRAY_SIZE(cached_lsr);
133
134 if (uart_lsr_val & (OE|PE|FE|BI)) {
135 printf("\n[SERIAL ERROR]\n");
136 do {
137 --cache_count;
138 printf("\t%3zu: RBR=0x%02x LSR=0x%02x\n", cache_count,
139 cached_rbr[cache_count], cached_lsr[cache_count]);
140 } while (cache_count > 0);
141 return -1;
142 }
143#endif
144 uart_lsr_clear(uart_base);
145
146 return uart_rbr_val;
147}
148
149#if CONFIG_POST & CONFIG_SYS_POST_UART
150# define LOOP(x) x
151#else
152# define LOOP(x)
153#endif
154
155#if BFIN_UART_HW_VER < 4
156
157LOOP(
158static void uart_loop(uint32_t uart_base, int state)
159{
160 u16 mcr;
161
162
163 while (!(uart_lsr_read(uart_base) & TEMT))
164 continue;
165
166 mcr = bfin_read(&pUART->mcr);
167 if (state)
168 mcr |= LOOP_ENA | MRTS;
169 else
170 mcr &= ~(LOOP_ENA | MRTS);
171 bfin_write(&pUART->mcr, mcr);
172}
173)
174
175#else
176
177LOOP(
178static void uart_loop(uint32_t uart_base, int state)
179{
180 u32 control;
181
182
183 while (!(uart_lsr_read(uart_base) & TEMT))
184 continue;
185
186 control = bfin_read(&pUART->control);
187 if (state)
188 control |= LOOP_ENA | MRTS;
189 else
190 control &= ~(LOOP_ENA | MRTS);
191 bfin_write(&pUART->control, control);
192}
193)
194
195#endif
196
197static inline void __serial_set_baud(uint32_t uart_base, uint32_t baud)
198{
199#ifdef CONFIG_DEBUG_EARLY_SERIAL
200 serial_early_set_baud(uart_base, baud);
201#else
202 uint16_t divisor = (get_uart_clk() + (baud * 8)) / (baud * 16)
203 - ANOMALY_05000230;
204
205
206 serial_set_divisor(uart_base, divisor);
207#endif
208}
209
210static void uart_puts(uint32_t uart_base, const char *s)
211{
212 while (*s)
213 uart_putc(uart_base, *s++);
214}
215
216#define DECL_BFIN_UART(n) \
217static int uart##n##_init(void) \
218{ \
219 const unsigned short pins[] = { _P_UART(n, RX), _P_UART(n, TX), 0, }; \
220 peripheral_request_list(pins, "bfin-uart"); \
221 uart_init(MMR_UART(n)); \
222 __serial_set_baud(MMR_UART(n), gd->baudrate); \
223 uart_lsr_clear(MMR_UART(n)); \
224 return 0; \
225} \
226\
227static int uart##n##_uninit(void) \
228{ \
229 return serial_early_uninit(MMR_UART(n)); \
230} \
231\
232static void uart##n##_setbrg(void) \
233{ \
234 __serial_set_baud(MMR_UART(n), gd->baudrate); \
235} \
236\
237static int uart##n##_getc(void) \
238{ \
239 return uart_getc(MMR_UART(n)); \
240} \
241\
242static int uart##n##_tstc(void) \
243{ \
244 return uart_tstc(MMR_UART(n)); \
245} \
246\
247static void uart##n##_putc(const char c) \
248{ \
249 uart_putc(MMR_UART(n), c); \
250} \
251\
252static void uart##n##_puts(const char *s) \
253{ \
254 uart_puts(MMR_UART(n), s); \
255} \
256\
257LOOP( \
258static void uart##n##_loop(int state) \
259{ \
260 uart_loop(MMR_UART(n), state); \
261} \
262) \
263\
264struct serial_device bfin_serial##n##_device = { \
265 .name = "bfin_uart"#n, \
266 .start = uart##n##_init, \
267 .stop = uart##n##_uninit, \
268 .setbrg = uart##n##_setbrg, \
269 .getc = uart##n##_getc, \
270 .tstc = uart##n##_tstc, \
271 .putc = uart##n##_putc, \
272 .puts = uart##n##_puts, \
273 LOOP(.loop = uart##n##_loop) \
274};
275
276#ifdef UART0_RBR
277DECL_BFIN_UART(0)
278#endif
279#ifdef UART1_RBR
280DECL_BFIN_UART(1)
281#endif
282#ifdef UART2_RBR
283DECL_BFIN_UART(2)
284#endif
285#ifdef UART3_RBR
286DECL_BFIN_UART(3)
287#endif
288
289__weak struct serial_device *default_serial_console(void)
290{
291#if CONFIG_UART_CONSOLE == 0
292 return &bfin_serial0_device;
293#elif CONFIG_UART_CONSOLE == 1
294 return &bfin_serial1_device;
295#elif CONFIG_UART_CONSOLE == 2
296 return &bfin_serial2_device;
297#elif CONFIG_UART_CONSOLE == 3
298 return &bfin_serial3_device;
299#endif
300}
301
302void bfin_serial_initialize(void)
303{
304#ifdef UART0_RBR
305 serial_register(&bfin_serial0_device);
306#endif
307#ifdef UART1_RBR
308 serial_register(&bfin_serial1_device);
309#endif
310#ifdef UART2_RBR
311 serial_register(&bfin_serial2_device);
312#endif
313#ifdef UART3_RBR
314 serial_register(&bfin_serial3_device);
315#endif
316}
317
318#ifdef CONFIG_DEBUG_EARLY_SERIAL
319inline void uart_early_putc(uint32_t uart_base, const char c)
320{
321
322 if (c == '\n')
323 uart_early_putc(uart_base, '\r');
324
325
326 while (!(_lsr_read(pUART) & THRE))
327 continue;
328
329
330 bfin_write(&pUART->thr, c);
331 SSYNC();
332}
333
334void uart_early_puts(const char *s)
335{
336 while (*s)
337 uart_early_putc(UART_BASE, *s++);
338}
339
340
341void _serial_early_set_baud(uint32_t baud)
342{
343 serial_early_set_baud(UART_BASE, baud);
344}
345
346
347void _serial_early_init(void)
348{
349 serial_early_init(UART_BASE);
350}
351#endif
352
353#elif defined(CONFIG_UART_MEM)
354
355char serial_logbuf[CONFIG_UART_MEM];
356char *serial_logbuf_head = serial_logbuf;
357
358int serial_mem_init(void)
359{
360 serial_logbuf_head = serial_logbuf;
361 return 0;
362}
363
364void serial_mem_setbrg(void)
365{
366}
367
368int serial_mem_tstc(void)
369{
370 return 0;
371}
372
373int serial_mem_getc(void)
374{
375 return 0;
376}
377
378void serial_mem_putc(const char c)
379{
380 *serial_logbuf_head = c;
381 if (++serial_logbuf_head == serial_logbuf + CONFIG_UART_MEM)
382 serial_logbuf_head = serial_logbuf;
383}
384
385void serial_mem_puts(const char *s)
386{
387 while (*s)
388 serial_putc(*s++);
389}
390
391struct serial_device bfin_serial_mem_device = {
392 .name = "bfin_uart_mem",
393 .start = serial_mem_init,
394 .setbrg = serial_mem_setbrg,
395 .getc = serial_mem_getc,
396 .tstc = serial_mem_tstc,
397 .putc = serial_mem_putc,
398 .puts = serial_mem_puts,
399};
400
401
402__weak struct serial_device *default_serial_console(void)
403{
404 return &bfin_serial_mem_device;
405}
406
407void bfin_serial_initialize(void)
408{
409 serial_register(&bfin_serial_mem_device);
410}
411#endif
412