uboot/include/configs/cm5200.h
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   1/*
   2 * (C) Copyright 2003-2007
   3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4 *
   5 * SPDX-License-Identifier:     GPL-2.0+
   6 */
   7
   8#ifndef __CONFIG_H
   9#define __CONFIG_H
  10
  11/*
  12 * High Level Configuration Options
  13 */
  14#define CONFIG_MPC5200          1       /* This is an MPC5200 CPU */
  15#define CONFIG_CM5200           1       /* ... on CM5200 platform */
  16
  17#define CONFIG_SYS_TEXT_BASE    0xfc000000
  18
  19#define CONFIG_HIGH_BATS        1       /* High BATs supported */
  20
  21/*
  22 * Supported commands
  23 */
  24#define CONFIG_CMD_BSP
  25#define CONFIG_CMD_DATE
  26#define CONFIG_CMD_DIAG
  27#define CONFIG_CMD_JFFS2
  28#define CONFIG_CMD_REGINFO
  29
  30/*
  31 * Serial console configuration
  32 */
  33#define CONFIG_PSC_CONSOLE      1       /* console is on PSC1 */
  34#define CONFIG_BAUDRATE         57600   /* ... at 57600 bps */
  35#define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200, 230400 }
  36
  37/*
  38 * Ethernet configuration
  39 */
  40#define CONFIG_MPC5xxx_FEC      1
  41#define CONFIG_MPC5xxx_FEC_MII100
  42#define CONFIG_PHY_ADDR         0x00
  43#define CONFIG_ENV_OVERWRITE    1       /* allow overwriting of ethaddr */
  44/* use misc_init_r() to read ethaddr from I2C EEPROM (see CONFIG_SYS_I2C_EEPROM) */
  45#define CONFIG_MISC_INIT_R      1
  46#define CONFIG_MAC_OFFSET       0x35    /* MAC address offset in I2C EEPROM */
  47
  48/*
  49 * POST support
  50 */
  51#define CONFIG_POST             (CONFIG_SYS_POST_MEMORY | CONFIG_SYS_POST_CPU | CONFIG_SYS_POST_I2C)
  52#define MPC5XXX_SRAM_POST_SIZE  (MPC5XXX_SRAM_SIZE - 4)
  53/* List of I2C addresses to be verified by POST */
  54#define CONFIG_SYS_POST_I2C_ADDRS       {CONFIG_SYS_I2C_SLAVE,  \
  55                                         CONFIG_SYS_I2C_IO,     \
  56                                         CONFIG_SYS_I2C_EEPROM}
  57
  58/* display image timestamps */
  59#define CONFIG_TIMESTAMP        1
  60
  61/*
  62 * Autobooting
  63 */
  64#define CONFIG_PREBOOT  "echo;" \
  65        "echo Type \"run net_nfs_fdt\" to mount root filesystem over NFS;" \
  66        "echo"
  67#undef CONFIG_BOOTARGS
  68
  69/*
  70 * Default environment settings
  71 */
  72#define CONFIG_EXTRA_ENV_SETTINGS                                       \
  73        "netdev=eth0\0"                                                 \
  74        "netmask=255.255.0.0\0"                                         \
  75        "ipaddr=192.168.160.33\0"                                       \
  76        "serverip=192.168.1.1\0"                                        \
  77        "gatewayip=192.168.1.1\0"                                       \
  78        "console=ttyPSC0\0"                                             \
  79        "u-boot_addr=100000\0"                                          \
  80        "kernel_addr=200000\0"                                          \
  81        "kernel_addr_flash=fc0c0000\0"                                  \
  82        "fdt_addr=400000\0"                                             \
  83        "fdt_addr_flash=fc0a0000\0"                                     \
  84        "ramdisk_addr=500000\0"                                         \
  85        "rootpath=/opt/eldk-4.1/ppc_6xx\0"                              \
  86        "u-boot=/tftpboot/cm5200/u-boot.bin\0"                          \
  87        "bootfile_fdt=/tftpboot/cm5200/uImage\0"                        \
  88        "fdt_file=/tftpboot/cm5200/cm5200.dtb\0"                        \
  89        "load=tftp ${u-boot_addr} ${u-boot}\0"                          \
  90        "update=prot off fc000000 +${filesize}; "                       \
  91                "era fc000000 +${filesize}; "                           \
  92                "cp.b ${u-boot_addr} fc000000 ${filesize}; "            \
  93                "prot on fc000000 +${filesize}\0"                       \
  94        "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
  95                "nfsroot=${serverip}:${rootpath}\0"                     \
  96        "flashargs=setenv bootargs root=/dev/mtdblock5 rw\0"            \
  97        "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
  98        "addinit=setenv bootargs ${bootargs} init=/linuxrc\0"           \
  99        "addcons=setenv bootargs ${bootargs} "                          \
 100                "console=${console},${baudrate}\0"                      \
 101        "addip=setenv bootargs ${bootargs} "                            \
 102                "ip=${ipaddr}:${serverip}:${gatewayip}:"                \
 103                "${netmask}:${hostname}:${netdev}:off panic=1\0"        \
 104        "flash_flash=run flashargs addinit addip addcons;"              \
 105                "bootm ${kernel_addr_flash} - ${fdt_addr_flash}\0"      \
 106        "net_nfs_fdt=tftp ${kernel_addr} ${bootfile_fdt}; "             \
 107                "tftp ${fdt_addr} ${fdt_file}; run nfsargs addip "      \
 108                "addcons; bootm ${kernel_addr} - ${fdt_addr}\0"         \
 109        ""
 110#define CONFIG_BOOTCOMMAND      "run flash_flash"
 111
 112/*
 113 * Low level configuration
 114 */
 115
 116/*
 117 * Clock configuration
 118 */
 119#define CONFIG_SYS_MPC5XXX_CLKIN        33000000        /* SYS_XTAL_IN = 33MHz */
 120#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK 1       /* IPB = 133MHz */
 121
 122/*
 123 * Memory map
 124 */
 125#define CONFIG_SYS_MBAR         0xF0000000
 126#define CONFIG_SYS_SDRAM_BASE           0x00000000
 127#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
 128
 129#define CONFIG_SYS_LOWBOOT              1
 130
 131/* Use ON-Chip SRAM until RAM will be available */
 132#define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
 133#ifdef CONFIG_POST
 134/* preserve space for the post_word at end of on-chip SRAM */
 135#define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_POST_SIZE
 136#else
 137#define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_SIZE
 138#endif
 139
 140#define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 141#define CONFIG_BOARD_TYPES      1       /* we use board_type */
 142
 143#define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 144
 145#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
 146#define CONFIG_SYS_MONITOR_LEN          (384 << 10)     /* 384 kB for Monitor */
 147#define CONFIG_SYS_MALLOC_LEN           (256 << 10)     /* 256 kB for malloc() */
 148#define CONFIG_SYS_BOOTMAPSZ            (8 << 20)       /* initial mem map for Linux */
 149
 150/*
 151 * Flash configuration
 152 */
 153#define CONFIG_SYS_FLASH_CFI            1
 154#define CONFIG_FLASH_CFI_DRIVER 1
 155#define CONFIG_SYS_FLASH_BASE           0xfc000000
 156/* we need these despite using CFI */
 157#define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max num of flash banks */
 158#define CONFIG_SYS_MAX_FLASH_SECT       256     /* max num of sectors on one chip */
 159#define CONFIG_SYS_FLASH_SIZE           0x02000000 /* 32 MiB */
 160
 161#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 162#define CONFIG_SYS_RAMBOOT              1
 163#undef CONFIG_SYS_LOWBOOT
 164#endif
 165
 166/*
 167 * Chip selects configuration
 168 */
 169/* Boot Chipselect */
 170#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
 171#define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 172#define CONFIG_SYS_BOOTCS_CFG           0x00087D31      /* for pci_clk = 33 MHz */
 173/* use board_early_init_r to enable flash write in CS_BOOT */
 174#define CONFIG_BOARD_EARLY_INIT_R
 175
 176/* Flash memory addressing */
 177#define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
 178#define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 179
 180/* No burst, dead cycle = 1 for CS0 (Flash) */
 181#define CONFIG_SYS_CS_BURST             0x00000000
 182#define CONFIG_SYS_CS_DEADCYCLE 0x00000001
 183
 184/*
 185 * SDRAM configuration
 186 * settings for k4s561632E-xx75, assuming XLB = 132 MHz
 187 */
 188#define SDRAM_MODE      0x00CD0000      /* CASL 3, burst length 8 */
 189#define SDRAM_CONTROL   0x514F0000
 190#define SDRAM_CONFIG1   0xE2333900
 191#define SDRAM_CONFIG2   0x8EE70000
 192
 193/*
 194 * MTD configuration
 195 */
 196#define CONFIG_CMD_MTDPARTS     1
 197#define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
 198#define CONFIG_FLASH_CFI_MTD
 199#define MTDIDS_DEFAULT          "nor0=cm5200-0"
 200#define MTDPARTS_DEFAULT        "mtdparts=cm5200-0:"                    \
 201                                        "384k(uboot),128k(env),"        \
 202                                        "128k(redund_env),128k(dtb),"   \
 203                                        "2m(kernel),27904k(rootfs),"    \
 204                                        "-(config)"
 205
 206/*
 207 * I2C configuration
 208 */
 209#define CONFIG_HARD_I2C         1       /* I2C with hardware support */
 210#define CONFIG_SYS_I2C_MODULE           2       /* Select I2C module #2 */
 211#define CONFIG_SYS_I2C_SPEED            40000   /* 40 kHz */
 212#define CONFIG_SYS_I2C_SLAVE            0x0
 213#define CONFIG_SYS_I2C_IO               0x38    /* PCA9554AD I2C I/O port address */
 214#define CONFIG_SYS_I2C_EEPROM           0x53    /* I2C EEPROM device address */
 215
 216/*
 217 * RTC configuration
 218 */
 219#define CONFIG_RTC_MPC5200      1       /* use internal MPC5200 RTC */
 220
 221/*
 222 * USB configuration
 223 */
 224#define CONFIG_USB_OHCI         1
 225#define CONFIG_USB_CLOCK        0x0001BBBB
 226#define CONFIG_USB_CONFIG       0x00001000
 227/* Partitions (for USB) */
 228
 229/*
 230 * Invoke our last_stage_init function - needed by fwupdate
 231 */
 232#define CONFIG_LAST_STAGE_INIT  1
 233
 234/*
 235 * Environment settings
 236 */
 237#define CONFIG_ENV_IS_IN_FLASH  1
 238#define CONFIG_ENV_SIZE         0x10000
 239#define CONFIG_ENV_SECT_SIZE    0x20000
 240#define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
 241/* Configuration of redundant environment */
 242#define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
 243#define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
 244
 245/*
 246 * Pin multiplexing configuration
 247 */
 248
 249/*
 250 * CS1/GPIO_WKUP_6: GPIO (default)
 251 * ALTs: CAN1 on I2C1, CAN2 on TIMER0/1
 252 * IRDA/PSC6: UART
 253 * Ether: Ethernet 100Mbit with MD
 254 * PCI_DIS: PCI controller disabled
 255 * USB: USB
 256 * PSC3: SPI with UART3
 257 * PSC2: UART
 258 * PSC1: UART
 259 */
 260#define CONFIG_SYS_GPS_PORT_CONFIG      0x10559C44
 261
 262/*
 263 * Miscellaneous configurable options
 264 */
 265#define CONFIG_SYS_LONGHELP             1       /* undef to save memory */
 266#define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size */
 267#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 268#define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 269#define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size */
 270
 271#define CONFIG_SYS_ALT_MEMTEST          1
 272#define CONFIG_SYS_MEMTEST_START        0x00100000      /* memtest works on */
 273#define CONFIG_SYS_MEMTEST_END          0x03f00000      /* 1 .. 63 MiB in SDRAM */
 274
 275#define CONFIG_SYS_LOAD_ADDR            0x100000        /* default load address */
 276
 277/*
 278 * Various low-level settings
 279 */
 280#define CONFIG_SYS_HID0_INIT            HID0_ICE | HID0_ICFI
 281#define CONFIG_SYS_HID0_FINAL           HID0_ICE
 282
 283#define CONFIG_SYS_XLB_PIPELINING       1       /* enable transaction pipeling */
 284
 285/*
 286 * Cache Configuration
 287 */
 288#define CONFIG_SYS_CACHELINE_SIZE       32      /* For MPC5xxx CPUs */
 289#ifdef CONFIG_CMD_KGDB
 290#define CONFIG_SYS_CACHELINE_SHIFT      5       /* log base 2 of the above value */
 291#endif
 292
 293/*
 294 * Flat Device Tree support
 295 */
 296#define OF_CPU                  "PowerPC,5200@0"
 297#define OF_SOC                  "soc5200@f0000000"
 298#define OF_TBCLK                (bd->bi_busfreq / 4)
 299#define OF_STDOUT_PATH          "/soc5200@f0000000/serial@2000"
 300
 301#endif /* __CONFIG_H */
 302